Datasheet Texas Instruments CDCP1803
| Manufacturer | Texas Instruments |
| Series | CDCP1803 |
1:3 LVPECL Clock Buffer with Programable Divider
Datasheets
1:3 LVPECL Clock Buffer with Programmable Divider, CDCP1803 datasheet
PDF, 873 Kb, Revision: F, File published: Dec 4, 2013
Extract from the document
Prices
Status
| CDCP1803RGER | CDCP1803RGERG4 | CDCP1803RGET | CDCP1803RGETG4 | CDCP1803RTHR | CDCP1803RTHT | |
|---|---|---|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Obsolete (Manufacturer has discontinued the production of the device) | Obsolete (Manufacturer has discontinued the production of the device) |
| Manufacture's Sample Availability | Yes | No | No | No | No | Yes |
Packaging
| CDCP1803RGER | CDCP1803RGERG4 | CDCP1803RGET | CDCP1803RGETG4 | CDCP1803RTHR | CDCP1803RTHT | |
|---|---|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 | 5 | 6 |
| Pin | 24 | 24 | 24 | 24 | 24 | 24 |
| Package Type | RGE | RGE | RGE | RGE | RTH | RTH |
| Industry STD Term | VQFN | VQFN | VQFN | VQFN | VQFNP | VQFNP |
| JEDEC Code | S-PQFP-N | S-PQFP-N | S-PQFP-N | S-PQFP-N | S-PQFP-N | S-PQFP-N |
| Package QTY | 3000 | 3000 | 250 | 250 | ||
| Carrier | LARGE T&R | LARGE T&R | SMALL T&R | SMALL T&R | ||
| Device Marking | 1803 | CDCP | 1803 | CDCP | ||
| Width (mm) | 4 | 4 | 4 | 4 | 4 | 4 |
| Length (mm) | 4 | 4 | 4 | 4 | 4 | 4 |
| Thickness (mm) | .88 | .88 | .88 | .88 | .85 | .85 |
| Pitch (mm) | .5 | .5 | .5 | .5 | .5 | .5 |
| Max Height (mm) | 1 | 1 | 1 | 1 | .9 | .9 |
| Mechanical Data | Download | Download | Download | Download | Download | Download |
Parametrics
| Parameters / Models | CDCP1803RGER | CDCP1803RGERG4 | CDCP1803RGET | CDCP1803RGETG4 | CDCP1803RTHR | CDCP1803RTHT |
|---|---|---|---|---|---|---|
| Additive RMS Jitter(Typ), fs | 150 | 150 | 150 | 150 | ||
| Additive RMS Jitter(Typ)(fs) | 150 | 150 | ||||
| Approx. Price (US$) | 3.15 | 1ku | 3.15 | 1ku | ||||
| Input Frequency(Max), MHz | 800 | 800 | 800 | 800 | ||
| Input Frequency(Max)(MHz) | 800 | 800 | ||||
| Input Level | LVPECL | LVPECL | LVPECL | LVPECL | LVPECL | LVPECL |
| No. of Outputs | 3 | 3 | ||||
| Number of Outputs | 3 | 3 | 3 | 3 | ||
| Operating Temperature Range, C | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | ||
| Operating Temperature Range(C) | -40 to 85 | -40 to 85 | ||||
| Output Frequency(Max), MHz | 800 | 800 | 800 | 800 | ||
| Output Frequency(Max)(MHz) | 800 | 800 | ||||
| Output Level | LVPECL | LVPECL | LVPECL | LVPECL | LVPECL | LVPECL |
| Package Group | VQFN | VQFN | VQFN | VQFN | VQFN | VQFN |
| Package Size: mm2:W x L, PKG | 24VQFN: 16 mm2: 4 x 4(VQFN) | 24VQFN: 16 mm2: 4 x 4(VQFN) | 24VQFN: 16 mm2: 4 x 4(VQFN) | 24VQFN: 16 mm2: 4 x 4(VQFN) | ||
| Package Size: mm2:W x L (PKG) | 24VQFN: 16 mm2: 4 x 4(VQFN) | 24VQFN: 16 mm2: 4 x 4(VQFN) | ||||
| Rating | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog |
| VCC, V | 3.3 | 3.3 | 3.3 | 3.3 | ||
| VCC Out, V | 3.3 | 3.3 | 3.3 | 3.3 | ||
| VCC Out(V) | 3.3 | 3.3 | ||||
| VCC(V) | 3.3 | 3.3 |
Eco Plan
| CDCP1803RGER | CDCP1803RGERG4 | CDCP1803RGET | CDCP1803RGETG4 | CDCP1803RTHR | CDCP1803RTHT | |
|---|---|---|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant | Compliant | Not Compliant | Not Compliant |
| Pb Free | No | No |
Application Notes
- Dual Purposes: Data Buffer, The Other Face of CDCP1803PDF, 462 Kb, File published: Aug 13, 2004
The CDCP1803 is a clock driver by design, but can be used as a data buffer. The CDCP1803 performance as a data buffer is demonstrated both in terms of the bit errorrate (BER) and eye pattern diagrams. The CDCP1803 is tested over several signaling rates and different PRBS patterns.
Model Line
Series: CDCP1803 (6)
Manufacturer's Classification
- Semiconductors> Clock and Timing> Clock Buffers> Dividers
