Datasheet Texas Instruments CDCVF855

ManufacturerTexas Instruments
SeriesCDCVF855
Datasheet Texas Instruments CDCVF855

2.5V Phase Lock Loop DDR Clock Driver

Datasheets

1.5-V Phase-Lock Loop Clock Driver datasheet
PDF, 788 Kb, Revision: A, File published: May 3, 2007
Extract from the document

Prices

Status

CDCVF855PWCDCVF855PWG4CDCVF855PWRCDCVF855PWRG4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoYesYes

Packaging

CDCVF855PWCDCVF855PWG4CDCVF855PWRCDCVF855PWRG4
N1234
Pin28282828
Package TypePWPWPWPW
Industry STD TermTSSOPTSSOPTSSOPTSSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY505020002000
CarrierTUBETUBELARGE T&RLARGE T&R
Device MarkingCDCVF855CDCVF855CDCVF855CDCVF855
Width (mm)4.44.44.44.4
Length (mm)9.79.79.79.7
Thickness (mm)1111
Pitch (mm).65.65.65.65
Max Height (mm)1.21.21.21.2
Mechanical DataDownloadDownloadDownloadDownload

Parametrics

Parameters / ModelsCDCVF855PW
CDCVF855PW
CDCVF855PWG4
CDCVF855PWG4
CDCVF855PWR
CDCVF855PWR
CDCVF855PWRG4
CDCVF855PWRG4
Absolute Jitter (Peak-to-Peak Cycle or Period Jitter), ps65656565
Number of Outputs4444
Operating Frequency Range(Max), MHz220220220220
Operating Frequency Range(Min), MHz60606060
Package GroupTSSOPTSSOPTSSOPTSSOP
Package Size: mm2:W x L, PKG28TSSOP: 62 mm2: 6.4 x 9.7(TSSOP)28TSSOP: 62 mm2: 6.4 x 9.7(TSSOP)28TSSOP: 62 mm2: 6.4 x 9.7(TSSOP)28TSSOP: 62 mm2: 6.4 x 9.7(TSSOP)
RatingCatalogCatalogCatalogCatalog
VCC, V2.52.52.52.5
t(phase error), ps50505050
tsk(o), ps40404040

Eco Plan

CDCVF855PWCDCVF855PWG4CDCVF855PWRCDCVF855PWRG4
RoHSCompliantCompliantCompliantCompliant

Model Line

Manufacturer's Classification

  • Semiconductors> Clock and Timing> Clock Buffers> Zero Delay Buffers