Datasheet Texas Instruments F28M35M52C
| Manufacturer | Texas Instruments |
| Series | F28M35M52C |
Concerto Microcontroller
Datasheets
F28M35x Concerto Microcontrollers datasheet
PDF, 2.2 Mb, Revision: I, File published: Jun 8, 2015
Extract from the document
Status
| F28M35M52C1RFPS | F28M35M52C1RFPT | |
|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No | No |
Packaging
| F28M35M52C1RFPS | F28M35M52C1RFPT | |
|---|---|---|
| N | 1 | 2 |
| Pin | 144 | 144 |
| Package Type | RFP | RFP |
| Industry STD Term | HTQFP | HTQFP |
| JEDEC Code | S-PQFP-G | S-PQFP-G |
| Package QTY | 60 | 60 |
| Carrier | JEDEC TRAY (5+1) | JEDEC TRAY (5+1) |
| Device Marking | F28M35M52C1RFPS | F28M35M52C1RFPT |
| Width (mm) | 20 | 20 |
| Length (mm) | 20 | 20 |
| Thickness (mm) | 1 | 1 |
| Pitch (mm) | .5 | .5 |
| Max Height (mm) | 1.2 | 1.2 |
| Mechanical Data | Download | Download |
Parametrics
| Parameters / Models | F28M35M52C1RFPS | F28M35M52C1RFPT |
|---|---|---|
| # of ADC Modules | 2 | 2 |
| 12-bit A/D, #Channels | 20 | 20 |
| ADC Channels | 20 | 20 |
| ADC Conversion Time, ns | 172 | 172 |
| ADC Resolution | 12-bit | 12-bit |
| ADC Sample & Hold | Dual | Dual |
| CAN | 2 | 2 |
| CPU | C28x, Cortex-M3 | C28x, Cortex-M3 |
| DMA, Ch | 1 6-Ch DMA, 1 32-ch DMA | 1 6-Ch DMA, 1 32-ch DMA |
| EMIF | Yes | Yes |
| Ethernet | 1 | 1 |
| FPU | Yes | Yes |
| Flash, KB | 1024 | 1024 |
| Frequency, MHz | 75 | 75 |
| GPIO | 64 | 64 |
| Generation | 28x + ARM Cortex M3 Concerto Series | 28x + ARM Cortex M3 Concerto Series |
| I2C | 3 | 3 |
| IO Supply, V | 3.3 | 3.3 |
| McBSP | 1 | 1 |
| Operating Temperature Range, C | -40 to 105,-40 to 125 | -40 to 105,-40 to 125 |
| PWM, Ch | 24 | 24 |
| Package Group | HTQFP | HTQFP |
| Package Size: mm2:W x L, PKG | 144HTQFP: 484 mm2: 22 x 22(HTQFP) | 144HTQFP: 484 mm2: 22 x 22(HTQFP) |
| RAM, KB | 136 | 136 |
| RISC Frequency, MHz | 75 | 75 |
| Rating | Catalog | Catalog |
| SPI | 5 | 5 |
| Timers | 3 32-Bit CPU,1 WD | 3 32-Bit CPU,1 WD |
| Total On-Chip Memory, KB | 1160 | 1160 |
| Total Serial Ports | 2 CANs,3 I2C,5 SPI,6 SCIs,1 McBSP,1 USB,1 Ethernet | 2 CANs,3 I2C,5 SPI,6 SCIs,1 McBSP,1 USB,1 Ethernet |
| UART | 6 | 6 |
| USB | 1 | 1 |
Eco Plan
| F28M35M52C1RFPS | F28M35M52C1RFPT | |
|---|---|---|
| RoHS | Compliant | Compliant |
Application Notes
- Calculator for CAN Bit Timing ParametersPDF, 37 Kb, File published: Mar 22, 2016
Controller Area Network (CAN) nodes use user-specified timing parameters to sample the asynchronous bitstream and recover the clock. These parameters are typically based on the frequency of the available reference oscillator. There may be several options available for a given frequency, and some of them will allow a looser oscillator tolerance than others. This application report details the creat
Model Line
Series: F28M35M52C (2)
Manufacturer's Classification
- Semiconductors> Microcontrollers (MCU)> Performance MCUs> Control + Automation> F28M3x