Datasheet Texas Instruments LMK03000

Manufacturer	Texas Instruments
Series	LMK03000

Datasheets

Status

Packaging

Parametrics

Parameters / Models	LMK03000CISQ/NOPB	LMK03000CISQX/NOPB	LMK03000DISQ/NOPB	LMK03000DISQE/NOPB	LMK03000DISQX/NOPB	LMK03000ISQ/NOPB	LMK03000ISQX/NOPB
Input Level	LVPECL, LVDS, LVCMOS	LVPECL, LVDS, LVCMOS	LVPECL, LVDS, LVCMOS	LVPECL, LVDS, LVCMOS	LVPECL, LVDS, LVCMOS	LVPECL, LVDS, LVCMOS	LVPECL, LVDS, LVCMOS
Number of Outputs	9	9	9	9	9	9	9
Operating Temperature Range, C	-40 to 85	-40 to 85	-40 to 85	-40 to 85	-40 to 85	-40 to 85	-40 to 85
Output Frequency(Max), MHz	1570	1570	1570	1570	1570	1570	1570
Output Frequency(Min), MHz	0.29	0.29	0.29	0.29	0.29	0.29	0.29
Output Level	LVDS, LVPECL, RF	LVDS, LVPECL, RF	LVDS, LVPECL, RF	LVDS, LVPECL, RF	LVDS, LVPECL, RF	LVDS, LVPECL, RF	LVDS, LVPECL, RF
Package Group	WQFN	WQFN	WQFN	WQFN	WQFN	WQFN	WQFN
Package Size: mm2:W x L, PKG	48WQFN: 49 mm2: 7 x 7(WQFN)	48WQFN: 49 mm2: 7 x 7(WQFN)	48WQFN: 49 mm2: 7 x 7(WQFN)	48WQFN: 49 mm2: 7 x 7(WQFN)	48WQFN: 49 mm2: 7 x 7(WQFN)	48WQFN: 49 mm2: 7 x 7(WQFN)	48WQFN: 49 mm2: 7 x 7(WQFN)
Programmability	uWire	uWire	uWire	uWire	uWire	uWire	uWire
Special Features	Design Tool Available	Design Tool Available	Design Tool Available	Design Tool Available	Design Tool Available	Design Tool Available	Design Tool Available
VCC Core, V	3.3	3.3	3.3	3.3	3.3	3.3	3.3
VCC Out, V	3.3	3.3	3.3	3.3	3.3	3.3	3.3

Eco Plan

Application Notes

• Download
  AN-1865 Frequency Synthesis and Planning for PLL Architectures (Rev. C)
  PDF, 173 Kb, Revision: C, File published: Apr 26, 2013
  This application report demonstrates the importance of understanding the least common multiple (LCM) and greatest common divisor (GCD).
• Download
  AN-1821 CPRI Repeater System (Rev. A)
  PDF, 1.2 Mb, Revision: A, File published: Apr 26, 2013
  This application report implements the Common Public Radio Interface (CPRI) for Remote Radio Heads(RRHs). The designer can use this application report for developing CPRI-based repeater systems inpoint-to-point or multi-hop configurations. This application report consists of:Designs for the CPRI SerDes Repeater Boards for the Radio Equipment (RE) and Radio EquipmentController (REC)
• Download
  Phase Synchronization with Multiple Devices and Frequencies (Rev. A)
  PDF, 199 Kb, Revision: A, File published: Apr 26, 2013
  This application note discusses how phase synchronization can be achieved when multiple chips are involved and also when the frequencies are not the same.
• Download
  Generating Precision Clocks for Time- Interleaved ADCs
  PDF, 680 Kb, File published: Aug 2, 2007
• Download
  High Speed ADCs with Interfacing, Driving and Clocking Schemes (Rev. A)
  PDF, 178 Kb, Revision: A, File published: Apr 26, 2013
  This application report discusses how the performance of high-speed pipeline ADCs can be optimized bydesigning the right clock circuitry, a good analog input network, as well as how to get the data at thesehigh speeds undistorted from the ADC onto an FPGA or ASIC.
• Download
  AN-2006 Synchronizing a DP83640 PTP Master to a GPS Receiver (Rev. A)
  PDF, 35 Kb, Revision: A, File published: Apr 26, 2013
  This application report discusses methods of synchronizing the precision time protocol (PTP) clock to aGPS receiver using the DP83640 precision PHYTERв„ў.
• Download
  AN-1734 Using the LMK03000C to Clean Recovered Clocks (Rev. B)
  PDF, 193 Kb, Revision: B, File published: Apr 26, 2013
  This application note delivers an example of how to clean recovered clocks, using the SCAN25100 SERDES and LMK03000C clock conditioner.

Model Line

Manufacturer's Classification

• Semiconductors> Clock and Timing> Clock Generators> General Purpose