Datasheet Texas Instruments SN5472
| Manufacturer | Texas Instruments |
| Series | SN5472 |
And-Gated J-K Master-Slave Flip-Flops With Preset And Clear
Datasheets
AND-Gated J-K Master-Slave Flip-Flops With Preset And Clear datasheet
PDF, 344 Kb, File published: Mar 1, 1988
Extract from the document
Status
| SN5472J | SNJ5472J | SNJ5472W | |
|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No | No | No |
Packaging
| SN5472J | SNJ5472J | SNJ5472W | |
|---|---|---|---|
| N | 1 | 2 | 3 |
| Pin | 14 | 14 | 14 |
| Package Type | J | J | W |
| Industry STD Term | CDIP | CDIP | CFP |
| JEDEC Code | R-GDIP-T | R-GDIP-T | R-GDFP-F |
| Package QTY | 1 | 1 | 1 |
| Carrier | TUBE | TUBE | TUBE |
| Device Marking | SN5472J | SNJ5472J | SNJ5472W |
| Width (mm) | 6.67 | 6.67 | 5.97 |
| Length (mm) | 19.56 | 19.56 | 9.21 |
| Thickness (mm) | 4.57 | 4.57 | 1.59 |
| Pitch (mm) | 2.54 | 2.54 | 1.27 |
| Max Height (mm) | 5.08 | 5.08 | 2.03 |
| Mechanical Data | Download | Download | Download |
Eco Plan
Model Line
Manufacturer's Classification
- Semiconductors> Space & High Reliability> Logic Products> Flip-Flop/Latch/Registers