Datasheet Texas Instruments SN65LVDS96
| Manufacturer | Texas Instruments |
| Series | SN65LVDS96 |
Serdes (Serializer/Deserializer) Receiver
Datasheets
LVDS Serdes Receiver datasheet
PDF, 335 Kb, Revision: H, File published: Jul 6, 2006
Extract from the document
Prices
Status
| SN65LVDS96DGG | SN65LVDS96DGGG4 | SN65LVDS96DGGR | SN65LVDS96DGGRG4 | |
|---|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No | Yes | No | Yes |
Packaging
| SN65LVDS96DGG | SN65LVDS96DGGG4 | SN65LVDS96DGGR | SN65LVDS96DGGRG4 | |
|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 |
| Pin | 48 | 48 | 48 | 48 |
| Package Type | DGG | DGG | DGG | DGG |
| Industry STD Term | TSSOP | TSSOP | TSSOP | TSSOP |
| JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G |
| Package QTY | 40 | 40 | 2000 | 2000 |
| Carrier | TUBE | TUBE | LARGE T&R | LARGE T&R |
| Device Marking | SN65LVDS96 | SN65LVDS96 | SN65LVDS96 | SN65LVDS96 |
| Width (mm) | 6.1 | 6.1 | 6.1 | 6.1 |
| Length (mm) | 12.5 | 12.5 | 12.5 | 12.5 |
| Thickness (mm) | 1.15 | 1.15 | 1.15 | 1.15 |
| Pitch (mm) | .5 | .5 | .5 | .5 |
| Max Height (mm) | 1.2 | 1.2 | 1.2 | 1.2 |
| Mechanical Data | Download | Download | Download | Download |
Parametrics
| Parameters / Models | SN65LVDS96DGG | SN65LVDS96DGGG4 | SN65LVDS96DGGR | SN65LVDS96DGGRG4 |
|---|---|---|---|---|
| Operating Temperature Range, C | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 |
| Output Compatibility | LVTTL | LVTTL | LVTTL | LVTTL |
| Package Group | TSSOP | TSSOP | TSSOP | TSSOP |
| Package Size: mm2:W x L, PKG | 48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP) | 48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP) | 48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP) | 48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP) |
| Protocols | Channel-Link I | Channel-Link I | Channel-Link I | Channel-Link I |
| Rating | Catalog | Catalog | Catalog | Catalog |
| Supply Voltage(s), V | 3.3 | 3.3 | 3.3 | 3.3 |
Eco Plan
| SN65LVDS96DGG | SN65LVDS96DGGG4 | SN65LVDS96DGGR | SN65LVDS96DGGRG4 | |
|---|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant | Compliant |
Application Notes
- LVDS Serdes 48 EVM Kit Setup And UsagePDF, 735 Kb, File published: Dec 17, 1998
This document describes the Texas Instruments (TI)(tm) LVDS Serdes 48 evaluation module (EVM) kit. The LVDS Serdes 48 EVM kit is used to evaluate and design high data throughput prototypes using the TI LVDS95 transmitter and LVDS96 receiver boards. The boards allow the designer to connect 21 bits of data and clock to the transmitter board where LVDS technology is available to serialize and transm
Model Line
Series: SN65LVDS96 (4)
Manufacturer's Classification
- Semiconductors> Interface> Serializer, Deserializer> BLVDS/LVDS SerDes (<100 MHz)
