Datasheet Texas Instruments SN74F125
| Manufacturer | Texas Instruments |
| Series | SN74F125 |
Quadruple Bus Buffer Gate With 3-State Outputs
Datasheets
Quadruple Bus Buffer Gate With 3-State Outputs datasheet
PDF, 642 Kb, Revision: B, File published: Jul 3, 2002
Extract from the document
Status
| SN74F125D | SN74F125DR | SN74F125DRE4 | SN74F125DRG4 | SN74F125N | SN74F125NE4 | SN74F125NSR | |
|---|---|---|---|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No | No | No | No | No | No | No |
Packaging
| SN74F125D | SN74F125DR | SN74F125DRE4 | SN74F125DRG4 | SN74F125N | SN74F125NE4 | SN74F125NSR | |
|---|---|---|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
| Pin | 14 | 14 | 14 | 14 | 14 | 14 | 14 |
| Package Type | D | D | D | D | N | N | NS |
| Industry STD Term | SOIC | SOIC | SOIC | SOIC | PDIP | PDIP | SOP |
| JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDIP-T | R-PDIP-T | R-PDSO-G |
| Package QTY | 50 | 2500 | 2500 | 2500 | 25 | 25 | 2000 |
| Carrier | TUBE | LARGE T&R | LARGE T&R | LARGE T&R | TUBE | TUBE | LARGE T&R |
| Device Marking | F125 | F125 | F125 | F125 | SN74F125N | SN74F125N | 74F125 |
| Width (mm) | 3.91 | 3.91 | 3.91 | 3.91 | 6.35 | 6.35 | 5.3 |
| Length (mm) | 8.65 | 8.65 | 8.65 | 8.65 | 19.3 | 19.3 | 10.3 |
| Thickness (mm) | 1.58 | 1.58 | 1.58 | 1.58 | 3.9 | 3.9 | 1.95 |
| Pitch (mm) | 1.27 | 1.27 | 1.27 | 1.27 | 2.54 | 2.54 | 1.27 |
| Max Height (mm) | 1.75 | 1.75 | 1.75 | 1.75 | 5.08 | 5.08 | 2 |
| Mechanical Data | Download | Download | Download | Download | Download | Download | Download |
Parametrics
| Parameters / Models | SN74F125D | SN74F125DR | SN74F125DRE4 | SN74F125DRG4 | SN74F125N | SN74F125NE4 | SN74F125NSR |
|---|---|---|---|---|---|---|---|
| Bits | 4 | 4 | 4 | 4 | 4 | 4 | 4 |
| F @ Nom Voltage(Max), Mhz | 70 | 70 | 70 | 70 | 70 | 70 | 70 |
| ICC @ Nom Voltage(Max), mA | 0.04 | 0.04 | 0.04 | 0.04 | 0.04 | 0.04 | 0.04 |
| Operating Temperature Range, C | 0 to 70 | 0 to 70 | 0 to 70 | 0 to 70 | 0 to 70 | 0 to 70 | 0 to 70 |
| Output Drive (IOL/IOH)(Max), mA | -15/64 | -15/64 | -15/64 | -15/64 | -15/64 | -15/64 | -15/64 |
| Package Group | SOIC | SOIC | SOIC | SOIC | PDIP | PDIP | SO |
| Package Size: mm2:W x L, PKG | 14SOIC: 52 mm2: 6 x 8.65(SOIC) | 14SOIC: 52 mm2: 6 x 8.65(SOIC) | 14SOIC: 52 mm2: 6 x 8.65(SOIC) | 14SOIC: 52 mm2: 6 x 8.65(SOIC) | See datasheet (PDIP) | See datasheet (PDIP) | 14SO: 80 mm2: 7.8 x 10.2(SO) |
| Rating | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog |
| Schmitt Trigger | No | No | No | No | No | No | No |
| Technology Family | F | F | F | F | F | F | F |
| VCC(Max), V | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 |
| VCC(Min), V | 4.5 | 4.5 | 4.5 | 4.5 | 4.5 | 4.5 | 4.5 |
| Voltage(Nom), V | 5 | 5 | 5 | 5 | 5 | 5 | 5 |
| tpd @ Nom Voltage(Max), ns | 8 | 8 | 8 | 8 | 8 | 8 | 8 |
Eco Plan
| SN74F125D | SN74F125DR | SN74F125DRE4 | SN74F125DRG4 | SN74F125N | SN74F125NE4 | SN74F125NSR | |
|---|---|---|---|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant |
| Pb Free | Yes | Yes |
Model Line
Series: SN74F125 (7)
Manufacturer's Classification
- Semiconductors> Logic> Buffer/Driver/Transceiver> Non-Inverting Buffer/Driver