Datasheet Texas Instruments SN74LVC1G74

ManufacturerTexas Instruments
SeriesSN74LVC1G74

Single Positive-Edge-Triggered D-Type Flip-Flop With Clear and Preset

Datasheets

Datasheet SN74LVC1G74
PDF, 1.4 Mb, Language: en, File uploaded: Nov 13, 2025, Pages: 31
Single Positive-Edge-Triggered D-Type Flip-Flop With Clear and Preset
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Datasheet SN74LVC1G74
PDF, 1.4 Mb, Revision: E, File published: Jan 25, 2015, Pages: 24
Single Positive-Edge-Triggered D-Type Flip-Flop with Clear and Preset datasheet
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Detailed Description

This single positive-edge-triggered D-type flip-flop is designed for 1.65-V to 5.5-V VCC operation.

NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package.

A low level at the preset ( PRE) or clear ( CLR) input sets or resets the outputs, regardless of the levels of the other inputs.

When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not related directly to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

Packaging

SN74LVC1G74DCTRSN74LVC1G74DCURSN74LVC1G74DCURG4SN74LVC1G74DCUTSN74LVC1G74DQERSN74LVC1G74DQERG4SN74LVC1G74RSE2SN74LVC1G74RSE2G4SN74LVC1G74RSERSN74LVC1G74RSERG4
N12345678910
PackageSSOP (DCT)VSSOP (DCU)VSSOP (DCU)VSSOP (DCU)X2SON (DQE)X2SON (DQE)UQFN (RSE)UQFN (RSE)UQFN (RSE)UQFN (RSE)
Pins8888888888

Parametrics

Parameters / ModelsSN74LVC1G74DCTRSN74LVC1G74DCURSN74LVC1G74DCURG4SN74LVC1G74DCUTSN74LVC1G74DQERSN74LVC1G74DQERG4SN74LVC1G74RSE2SN74LVC1G74RSE2G4SN74LVC1G74RSERSN74LVC1G74RSERG4
MSL Rating/Peak ReflowLevel-1-260C-UNLIMLevel-1-260C-UNLIMLevel-1-260C-UNLIMLevel-1-260C-UNLIMLevel-1-260C-UNLIMLevel-1-260C-UNLIMLevel-1-260C-UNLIMLevel-1-260C-UNLIMLevel-1-260C-UNLIMLevel-1-260C-UNLIM
Material TypeProductionProductionProductionProductionProductionProductionProductionProductionProductionProduction
Operating Temperature Range (°C)-40 to 125-40 to 125-40 to 125-40 to 125-40 to 125-40 to 125-40 to 125-40 to 125-40 to 125-40 to 125
Package CarrierLARGE T&RLARGE T&RLARGE T&RSMALL T&RLARGE T&RLARGE T&RLARGE T&RLARGE T&RLARGE T&RLARGE T&R
Package Quantity300030003000250500050005000500050005000
Product StatusACTIVEACTIVEACTIVEACTIVEACTIVEACTIVEACTIVEACTIVEACTIVEACTIVE
REACH StatusYesYesYesYesYesYesYesYesYesYes
RoHS CompliantYesYesYesYesYesYesYesYesYesYes

Application Notes

  • LVC Characterization Information
    PDF, 114 Kb, File published: Dec 1, 1996
    This document provides characterization information about low-voltage logic (LVL) that operates from a 3.3-V power supply. It addresses the issues of interfacing to 5-V logic ac performance power considerations input and output characteristics and signal integrity for this family of devices.
  • Use of the CMOS Unbuffered Inverter in Oscillator Circuits
    PDF, 796 Kb, File published: Nov 6, 2003
    CMOS devices have a high input impedance high gain and high bandwidth. These characteristics are similar to ideal amplifier characteristics and hence a CMOS buffer or inverter can be used in an oscillator circuit in conjunction with other passive components. Now CMOS oscillator circuits are widely used in high-speed applications because they are economical easy to use and take significantly

Model Line

Manufacturer's Classification

  • Logic & voltage translation > Flip-flops, latches & registers > D-type flip-flops