Datasheet Texas Instruments SN74LVCH32374A
| Manufacturer | Texas Instruments | 
| Series | SN74LVCH32374A | 

32-Bit Edge-Triggered D-Type Flip-Flop With 3-State Outputs
Datasheets
32-Bit Edge-Triggered D-Type Flip-Flop With 3-State Outputs datasheet
PDF, 733 Kb, Revision: E, File published: Aug 22, 2007
Extract from the document
Status
| SN74LVCH32374AGKER | SN74LVCH32374AZKER | |
|---|---|---|
| Lifecycle Status | Obsolete (Manufacturer has discontinued the production of the device) | Active (Recommended for new designs) | 
| Manufacture's Sample Availability | No | No | 
Packaging
| SN74LVCH32374AGKER | SN74LVCH32374AZKER | |
|---|---|---|
| N | 1 | 2 | 
| Pin | 96 | 96 | 
| Package Type | GKE | ZKE | 
| Industry STD Term | BGA MICROSTAR | BGA MICROSTAR | 
| JEDEC Code | R-PBGA-N | R-PBGA-N | 
| Device Marking | CH374A | CH374A | 
| Width (mm) | 5.5 | 5.5 | 
| Length (mm) | 13.5 | 13.5 | 
| Thickness (mm) | .9 | .85 | 
| Pitch (mm) | .8 | .8 | 
| Max Height (mm) | 1.4 | 1.4 | 
| Mechanical Data | Download | Download | 
| Package QTY | 1000 | |
| Carrier | LARGE T&R | 
Parametrics
| Parameters / Models | SN74LVCH32374AGKER  | SN74LVCH32374AZKER  | 
|---|---|---|
| 3-State Output | Yes | Yes | 
| Approx. Price (US$) | 3.06 | 1ku | |
| Bits | 32 | |
| Bits(#) | 32 | |
| F @ Nom Voltage(Max), Mhz | 100 | |
| F @ Nom Voltage(Max)(Mhz) | 100 | |
| ICC @ Nom Voltage(Max), mA | 0.04 | |
| ICC @ Nom Voltage(Max)(mA) | 0.04 | |
| Input Type | TTL CMOS | |
| Operating Temperature Range, C | -40 to 85 | |
| Operating Temperature Range(C) | -40 to 85 | |
| Output Drive (IOL/IOH)(Max), mA | 24/-24 | |
| Output Drive (IOL/IOH)(Max)(mA) | 24/-24 | |
| Output Type | CMOS | |
| Package Group | LFBGA | LFBGA | 
| Package Size: mm2:W x L, PKG | 96LFBGA: 74 mm2: 5.5 x 13.5(LFBGA) | |
| Package Size: mm2:W x L (PKG) | 96LFBGA: 74 mm2: 5.5 x 13.5(LFBGA) | |
| Rating | Catalog | Catalog | 
| Schmitt Trigger | No | No | 
| Technology Family | LVC | LVC | 
| VCC(Max), V | 3.6 | |
| VCC(Max)(V) | 3.6 | |
| VCC(Min), V | 1.65 | |
| VCC(Min)(V) | 1.65 | |
| Voltage(Nom), V | 1.8,2.5,2.7,3.3 | |
| Voltage(Nom)(V) | 1.8 2.5 2.7 3.3 | |
| tpd @ Nom Voltage(Max), ns | 4.9,4.5 | |
| tpd @ Nom Voltage(Max)(ns) | 4.9 4.5 | 
Eco Plan
| SN74LVCH32374AGKER | SN74LVCH32374AZKER | |
|---|---|---|
| RoHS | Not Compliant | Compliant | 
| Pb Free | No | 
Application Notes
- Bus-Hold CircuitPDF, 418 Kb, File published: Feb 5, 2001
 When designing systems that include CMOS devices, designers must pay special attention to the operating condition in which all of the bus drivers are in an inactive, high-impedance condition (3-state). Unless special measures are taken, this condition can lead to undefined levels and, thus, to a significant increase in the device?s power dissipation. In extreme cases, this leads to oscillation of
Model Line
Series: SN74LVCH32374A (2)
Manufacturer's Classification
- Semiconductors> Logic> Flip-Flop/Latch/Register> D-Type Flip-Flop