Datasheet Texas Instruments SN74LVT162245

ManufacturerTexas Instruments
SeriesSN74LVT162245
Datasheet Texas Instruments SN74LVT162245

3.3-V ABT 16-Bit Bus Transceivers With 3-State Outputs

Datasheets

Datasheet
TSP

Prices

Status

74LVT162245DGGRE4SN74LVT162245DGGRSN74LVT162245DLSN74LVT162245DLR
Lifecycle StatusActive (Recommended for new designs)NRND (Not recommended for new designs)NRND (Not recommended for new designs)NRND (Not recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNo

Packaging

74LVT162245DGGRE4SN74LVT162245DGGRSN74LVT162245DLSN74LVT162245DLR
N1234
Pin48484848
Package TypeDGGDGGDLDL
Industry STD TermTSSOPTSSOPSSOPSSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Width (mm)6.16.17.497.49
Length (mm)12.512.515.8815.88
Thickness (mm)1.151.152.592.59
Pitch (mm).5.5.635.635
Max Height (mm)1.21.22.792.79
Mechanical DataDownloadDownloadDownloadDownload
Package QTY2000251000
CarrierLARGE T&RTUBELARGE T&R
Device MarkingLVT162245LVT162245LVT162245

Parametrics

Parameters / Models74LVT162245DGGRE4
74LVT162245DGGRE4
SN74LVT162245DGGR
SN74LVT162245DGGR
SN74LVT162245DL
SN74LVT162245DL
SN74LVT162245DLR
SN74LVT162245DLR
Bits(#)8888
F @ Nom Voltage(Max)(Mhz)160160160160
ICC @ Nom Voltage(Max)(mA)0.080.080.080.08
Operating Temperature Range(C)-40 to 85-40 to 85-40 to 85-40 to 85
Output Drive (IOL/IOH)(Max)(mA)-32/64-32/64-32/64-32/64
Package GroupTSSOPTSSOPTSSOPTSSOP
Package Size: mm2:W x L (PKG)48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)
RatingCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNo
Technology FamilyLVTLVTLVTLVT
VCC(Max)(V)3.63.63.63.6
VCC(Min)(V)2.72.72.72.7
Voltage(Nom)(V)3.33.33.33.3
tpd @ Nom Voltage(Max)(ns)28282828

Eco Plan

74LVT162245DGGRE4SN74LVT162245DGGRSN74LVT162245DLSN74LVT162245DLR
RoHSNot CompliantNot CompliantNot CompliantNot Compliant
Pb FreeNoNoNoNo

Application Notes

  • LVT Family Characteristics (Rev. A)
    PDF, 98 Kb, Revision: A, File published: Mar 1, 1998
    To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti
  • LVT-to-LVTH Conversion
    PDF, 84 Kb, File published: Dec 8, 1998
    Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.
  • 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
    PDF, 895 Kb, Revision: B, File published: May 22, 2002
    TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa
  • Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)
    PDF, 105 Kb, Revision: A, File published: Aug 1, 1997
    The spectrum of bus-interface devices with damping resistors or balanced/light output drive currently offered by various logic vendors is confusing at best. Inconsistencies in naming conventions and methods used for implementation make it difficult to identify the best solution for a given application. This report attempts to clarify the issue by looking at several vendors? approaches and discussi
  • Understanding Advanced Bus-Interface Products Design Guide
    PDF, 253 Kb, File published: May 1, 1996
  • Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices
    PDF, 209 Kb, File published: May 10, 2002
    Many telecom and networking applications require that cards be inserted and extracted from a live backplane without interrupting data or damaging components. To achieve this interface terminals of the card must be electrically isolated from the bus system during insertion or extraction from the backplane. To facilitate this Texas Instruments provides bus-interface and logic devices with features
  • Live Insertion
    PDF, 150 Kb, File published: Oct 1, 1996
    Many applications require the ability to exchange modules in electronic systems without removing the supply voltage from the module (live insertion). For example an electronic telephone exchange must always remain operational even during module maintenance and repair. To avoid damaging components additional circuitry modifications are necessary. This document describes in detail the phenomena tha
  • Input and Output Characteristics of Digital Integrated Circuits
    PDF, 1.7 Mb, File published: Oct 1, 1996
    This report contains a comprehensive collection of the input and output characteristic curves of typical integrated circuits from various logic families. These curves go beyond the information given in data sheets by providing additional details regarding the characteristics of the components. This knowledge is particularly useful when for example a decision must be made as to which circuit shou

Model Line

Manufacturer's Classification

  • Semiconductors> Logic> Buffer/Driver/Transceiver> Standard Transceiver
EMS supplier