Datasheet Texas Instruments SN75LVDS83
| Manufacturer | Texas Instruments |
| Series | SN75LVDS83 |
FlatLink(TM) Transmitter
Datasheets
FlatLink (tm) Transmitters datasheet
PDF, 884 Kb, Revision: I, File published: May 19, 2009
Extract from the document
Status
| SN75LVDS83DGG | SN75LVDS83DGGG4 | SN75LVDS83DGGR | SN75LVDS83DGGR-P | SN75LVDS83DGGRG4 | SN75LVDS83ZQL | SN75LVDS83ZQLR | |
|---|---|---|---|---|---|---|---|
| Lifecycle Status | NRND (Not recommended for new designs) | NRND (Not recommended for new designs) | NRND (Not recommended for new designs) | NRND (Not recommended for new designs) | NRND (Not recommended for new designs) | NRND (Not recommended for new designs) | NRND (Not recommended for new designs) |
| Manufacture's Sample Availability | No | No | No | No | No | No | No |
Packaging
| SN75LVDS83DGG | SN75LVDS83DGGG4 | SN75LVDS83DGGR | SN75LVDS83DGGR-P | SN75LVDS83DGGRG4 | SN75LVDS83ZQL | SN75LVDS83ZQLR | |
|---|---|---|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
| Pin | 56 | 56 | 56 | 56 | 56 | 56 | 52 |
| Package Type | DGG | DGG | DGG | DGG | DGG | ZQL | ZQL |
| Industry STD Term | TSSOP | TSSOP | TSSOP | TSSOP | TSSOP | BGA MICROSTAR JUNIOR | BGA MICROSTAR JUNIOR |
| JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PBGA-N | R-PBGA-N |
| Package QTY | 35 | 35 | 2000 | 2000 | |||
| Carrier | TUBE | TUBE | LARGE T&R | LARGE T&R | |||
| Device Marking | SN75LVDS83 | SN75LVDS83 | SN75LVDS83 | SN75LVDS83 | |||
| Width (mm) | 6.1 | 6.1 | 6.1 | 6.1 | 6.1 | 4.5 | 4.5 |
| Length (mm) | 14 | 14 | 14 | 14 | 14 | 7 | 7 |
| Thickness (mm) | 1.15 | 1.15 | 1.15 | 1.15 | 1.15 | .75 | .75 |
| Pitch (mm) | .5 | .5 | .5 | .5 | .5 | .65 | .65 |
| Max Height (mm) | 1.2 | 1.2 | 1.2 | 1.2 | 1.2 | 1 | 1 |
| Mechanical Data | Download | Download | Download | Download | Download | Download | Download |
Eco Plan
| SN75LVDS83DGG | SN75LVDS83DGGG4 | SN75LVDS83DGGR | SN75LVDS83DGGR-P | SN75LVDS83DGGRG4 | SN75LVDS83ZQL | SN75LVDS83ZQLR | |
|---|---|---|---|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant | Not Compliant | Compliant | Not Compliant | Not Compliant |
| Pb Free | No | No | No |
Application Notes
- Time Budgeting of the Flatlink Interface Application ReportPDF, 99 Kb, File published: Jun 11, 1997
This document describes the FlatLinkE point-to-point data-transmission interface that provides better than a two-to-one reduction in the number of signal lines used for synchronous parallel data-bus structures. - Flatlink Data Transmission System Design Overview (Rev. A)PDF, 127 Kb, Revision: A, File published: Jun 1, 2001
FlatLink is a data transmission system that can provide better than a 2:1 reduction in the number of signal lines used for synchronous parallel data bus structures with no loss in data throughput. To do this, FlatLink takes single-ended data at clock rates of up to 68 MHz and increases the data signaling rate seven times up to 476 Mbps. The following report provides some design guidelinesfo
Model Line
Series: SN75LVDS83 (7)
Manufacturer's Classification
- Semiconductors> Interface> Display & Imaging SerDes> FlatLink/FPD-Link (LVDS for LCD)