Datasheet Texas Instruments SN75LVDT386

Manufacturer	Texas Instruments
Series	SN75LVDT386

Datasheet Texas Instruments SN75LVDT386

16-Channel LVDS Receiver

Datasheets

PDF, 1.7 Mb, Revision: I, File published: Jul 29, 2014

Extract from the document

Status

	SN75LVDT386DGG	SN75LVDT386DGGG4	SN75LVDT386DGGR
Lifecycle Status	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)
Manufacture's Sample Availability	Yes	No	No

Packaging

	SN75LVDT386DGG	SN75LVDT386DGGG4	SN75LVDT386DGGR
N	1	2	3
Pin	64	64	64
Package Type	DGG	DGG	DGG
Industry STD Term	TSSOP	TSSOP	TSSOP
JEDEC Code	R-PDSO-G	R-PDSO-G	R-PDSO-G
Package QTY	25	25	2000
Carrier	TUBE	TUBE	LARGE T&R
Device Marking	75LVDT386	75LVDT386	75LVDT386
Width (mm)	6.1	6.1	6.1
Length (mm)	17	17	17
Thickness (mm)	1.15	1.15	1.15
Pitch (mm)	.5	.5	.5
Max Height (mm)	1.2	1.2	1.2
Mechanical Data	Download	Download	Download

Parametrics

Parameters / Models	SN75LVDT386DGG	SN75LVDT386DGGG4	SN75LVDT386DGGR
Device Type	Receiver	Receiver	Receiver
ESD HBM, kV	4	4	4
Function	Receiver	Receiver	Receiver
ICC(Max), mA	70	70	70
Input Signal	LVDS	LVDS	LVDS
No. of Rx	16	16	16
Operating Temperature Range, C	0 to 70	0 to 70	0 to 70
Output Signal	LVTTL	LVTTL	LVTTL
Package Group	TSSOP	TSSOP	TSSOP
Package Size: mm2:W x L, PKG	64TSSOP: 138 mm2: 8.1 x 17(TSSOP)	64TSSOP: 138 mm2: 8.1 x 17(TSSOP)	64TSSOP: 138 mm2: 8.1 x 17(TSSOP)
Protocols	LVDS	LVDS	LVDS
Signaling Rate, Mbps	630	630	630

Eco Plan

	SN75LVDT386DGG	SN75LVDT386DGGG4	SN75LVDT386DGGR
RoHS	Compliant	Compliant	Compliant

Model Line

Series: SN75LVDT386 (3)

SN75LVDT386DGG SN75LVDT386DGGG4 SN75LVDT386DGGR

Manufacturer's Classification

Semiconductors> Interface> LVDS/M-LVDS/ECL/CML> LVDS PHY (<800Mbps)

Slices

Microcontrollers