Datasheet Texas Instruments TLV5613
| Manufacturer | Texas Instruments |
| Series | TLV5613 |

12-Bit, DAC, Parallel, Voltage Out, Pgrmable Settling Time/Pwr Consump., PwrDn
Datasheets
12-Bit Parallel Digital-to-Analog Converters With Power Down datasheet
PDF, 285 Kb, Revision: B, File published: Nov 22, 2000
Extract from the document
Status
| TLV5613CDW | TLV5613CDWG4 | TLV5613CPW | TLV5613IDW | TLV5613IPW | TLV5613IPWG4 | TLV5613IPWR | |
|---|---|---|---|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No | No | No | No | No | No | No |
Packaging
| TLV5613CDW | TLV5613CDWG4 | TLV5613CPW | TLV5613IDW | TLV5613IPW | TLV5613IPWG4 | TLV5613IPWR | |
|---|---|---|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
| Pin | 20 | 20 | 20 | 20 | 20 | 20 | 20 |
| Package Type | DW | DW | PW | DW | PW | PW | PW |
| Industry STD Term | SOIC | SOIC | TSSOP | SOIC | TSSOP | TSSOP | TSSOP |
| JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G |
| Package QTY | 25 | 25 | 70 | 25 | 70 | 70 | 2000 |
| Carrier | TUBE | TUBE | TUBE | TUBE | TUBE | TUBE | LARGE T&R |
| Device Marking | TLV5613C | TLV5613C | TV5613 | TLV5613I | TY5613 | TY5613 | TY5613 |
| Width (mm) | 7.5 | 7.5 | 4.4 | 7.5 | 4.4 | 4.4 | 4.4 |
| Length (mm) | 12.8 | 12.8 | 6.5 | 12.8 | 6.5 | 6.5 | 6.5 |
| Thickness (mm) | 2.35 | 2.35 | 1 | 2.35 | 1 | 1 | 1 |
| Pitch (mm) | 1.27 | 1.27 | .65 | 1.27 | .65 | .65 | .65 |
| Max Height (mm) | 2.65 | 2.65 | 1.2 | 2.65 | 1.2 | 1.2 | 1.2 |
| Mechanical Data | Download | Download | Download | Download | Download | Download | Download |
Parametrics
| Parameters / Models | TLV5613CDW![]() | TLV5613CDWG4![]() | TLV5613CPW![]() | TLV5613IDW![]() | TLV5613IPW![]() | TLV5613IPWG4![]() | TLV5613IPWR![]() |
|---|---|---|---|---|---|---|---|
| Approx. Price (US$) | 3.26 | 1ku | ||||||
| Code to Code Glitch(Typ), nV-sec | 1 | 1 | 1 | 1 | 1 | 1 | |
| Code to Code Glitch(Typ)(nV-sec) | 1 | ||||||
| DAC Architecture | String | String | String | String | String | String | String |
| DAC Channels | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
| Gain Error(Max), %FSR | 0.5 | 0.5 | 0.5 | 0.5 | 0.5 | 0.5 | |
| Gain Error(Max)(%FSR) | 0.5 | ||||||
| INL(Max), +/-LSB | 4 | 4 | 4 | 4 | 4 | 4 | |
| INL(Max)(+/-LSB) | 4 | ||||||
| Interface | Parallel | Parallel | Parallel | Parallel | Parallel | Parallel | Parallel |
| Offset Error(Max), % | N/A | N/A | N/A | N/A | N/A | N/A | |
| Offset Error(Max)(%) | N/A | ||||||
| Operating Temperature Range, C | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | |
| Operating Temperature Range(C) | -40 to 85 0 to 70 | ||||||
| Output Range Max., mA/V | 5.1 | 5.1 | 5.1 | 5.1 | 5.1 | 5.1 | |
| Output Range Max.(mA/V) | 5.1 | ||||||
| Output Type | Buffered Voltage | Buffered Voltage | Buffered Voltage | Buffered Voltage | Buffered Voltage | Buffered Voltage | Buffered Voltage |
| Package Group | SOIC | SOIC | TSSOP | SOIC | TSSOP | TSSOP | TSSOP |
| Package Size: mm2:W x L, PKG | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) | 20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) | 20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) | 20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) | |
| Package Size: mm2:W x L (PKG) | 20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) | ||||||
| Power Consumption(Typ), mW | 1.2 | 1.2 | 1.2 | 1.2 | 1.2 | 1.2 | |
| Power Consumption(Typ)(mW) | 1.2 | ||||||
| Rating | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog |
| Reference: Type | Ext | Ext | Ext | Ext | Ext | Ext | Ext |
| Resolution, Bits | 12 | 12 | 12 | 12 | 12 | 12 | |
| Resolution(Bits) | 12 | ||||||
| Sample / Update Rate, MSPS | 0.286 | 0.286 | 0.286 | 0.286 | 0.286 | 0.286 | |
| Sample / Update Rate(MSPS) | 0.286 | ||||||
| Settling Time, µs | 1 | 1 | 1 | 1 | 1 | 1 | |
| Settling Time(Вµs) | 1 | ||||||
| Special Features | N/A | N/A | N/A | N/A | N/A | N/A | N/A |
| Zero Code Error(Typ), mV | 20 | 20 | 20 | 20 | 20 | 20 | |
| Zero Code Error(Typ)(mV) | 20 |
Eco Plan
| TLV5613CDW | TLV5613CDWG4 | TLV5613CPW | TLV5613IDW | TLV5613IPW | TLV5613IPWG4 | TLV5613IPWR | |
|---|---|---|---|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant |
| Pb Free | Yes |
Model Line
Series: TLV5613 (7)
Manufacturer's Classification
- Semiconductors> Data Converters> Digital-to-Analog Converters (DACs)> Precision DACs (=<10MSPS)