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Datasheet Linear Technology LTM9003-AA

ManufacturerLinear Technology
SeriesLTM9003-AA

12-Bit Digital Pre-Distortion Receiver Subsystem

Datasheets

  • Download » Datasheet, PDF, 448 Kb, File uploaded 08-21-2017
    LTM9003 - 12-Bit Digital Pre-Distortion Receiver Subsystem
    Docket ↓
    LTM9003
    12-Bit Digital Pre-Distortion
    µModule Receiver
    Subsystem
    Description Features Fully Integrated Receiver Subsystem for Digital
    Pre-Distortion Applications
    n Down-Converting Mixer with Wide RF Frequency
    Range: 400MHz to 3.8GHz
    n 125MHz Wide Bandpass Filter, 12
    >12 dB
    dB LO Input Return Loss ZO = 50Ω, 900MHz to 3500MHz (No External Matching)
    LTM9003-AA
    LTM9003-AB >10
    >10 dB
    dB RF Input Power for –1dBFS LTM9003-AA
    LTM9003-AB –1.7
    –1.7 dBm
    dBm LO Input Power 1200MHz to 4200MHz, LTM9003-AA or
    1200MHz to 3500MHz, LTM9003-AB
    380MHz to 1200MHz LO to RF Leakage LTM9003-AA
    fLO = 380MHz to 1600MHz
    fLO = 1600MHz to 4000MHz 38 dB
    dB RF to LO Isolation –8 ...

Prices

Packaging

Parametrics

LTM9003CV-AA#PBFLTM9003IV-AA#PBF
ADCs11
ArchitecturePipelinePipeline
Bits, bits1212
Number of Channels11
Demo BoardsDC1437B-AA,DC1437B-AB,DC1642A-AB,DC1642A-AADC1437B-AA,DC1437B-AB,DC1642A-AB,DC1642A-AA
Export Controlnono
FeaturesClock Duty Cycle StabilizerClock Duty Cycle Stabilizer
I/OParallel LVDSParallel LVDS
Input DriveDifferential, Single-EndedDifferential, Single-Ended
Internal Referenceyesyes
Latency55
Operating Temperature Range, °C0 to 70-40 to 85
Power, mW14721472
SFDR, dB67.467.4
SINAD, dB5757
Simultaneousnono
Speed, ksps250000250000
Supply Voltage Range2.5V (ADC), 3.3V (Amp), 3.3V (Mixer)2.5V (ADC), 3.3V (Amp), 3.3V (Mixer)

Eco Plan

LTM9003CV-AA#PBFLTM9003IV-AA#PBF
RoHSCompliantCompliant

Other Options

LTM9003-AB

Articles

  • Download » Articles - LT Journal, PDF, 789 Kb, 06-30-2010
    Tiny Digital Predistortion Receiver Integrates RF, Filter and ADC
    Docket ↓
    Tiny Digital Predistortion Receiver
    Integrates RF, Filter and ADC
    Todd Nelson The power amplifier (PA)
    consumes more electrical
    power than any other block
    in a cellular basestation and
    is therefore a significant
    factor in the operating
    expense for the service
    provider. Complex digital
    modulation requires
    extremely high linearity
    from the PA, so it must be
    driven well below saturation
    where it is most efficient.
    To improve PA efficiency,
    designers use digital
    techniques to reduce the
    crest factor and improve PA
    linearity, allowing it to run
    closer to saturation. Digital
    predistortion (DPD) has
    emerged as the preferred ...

Moldel Line

Series: LTM9003-AA (2)

Manufacturer's Classification

  • Data Conversion > Analog-to-Digital Converters (ADC) > High Speed ADCs (Fs >=10Msps)
  • Data Conversion > Signal Chain Module Receivers

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