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Datasheet Linear Technology LTM9004-AA

ManufacturerLinear Technology
SeriesLTM9004-AA

14-Bit Direct Conversion Receiver Subsystem

Datasheets

  • Download » Datasheet PDF, 1.7 Mb, Revision: A, File uploaded: Aug 21, 2017
    LTM9004 - 14-Bit Direct Conversion Receiver Subsystem
    Docket ↓
    LTM9004
    14-Bit Direct Conversion
    Receiver Subsystem
    Features Description Integrated Dual 14-Bit, High-Speed ADC, Lowpass
    Filter, Differential Gain Stages and I/Q Demodulator
    n Lowpass Filter for Each ADC Channel 1.92MHz (LTM9004-AA) 4.42MHz (LTM9004-AB) 9.42MHz (LTM9004-AC) 20MHz (LTM9004-AD)
    n RF Input Frequency Range: 0.7GHz to 2.7GHz
    n 50О© Single-Ended RF and LO Ports
    n I/Q Gain Mismatch: 0.2dB Typical
    n I/Q Phase Mismatch: 1.5 Deg Typical
    n Voltage-Adjustable Demodulator DC Offsets
    n 76dB/1.92MHz SNR (LTM9004-AA)
    n 63.5dB SFDR (LTM9004-AA)
    n Clock Duty Cycle Stabilizer
    n Low Power: 1.83W
    n Shutdown and Nap Modes
    n 15mm Г— 22mm LGA Package The LTMВ®9004 is a 14-bit direct conversion receiver subsystem. Utilizing an integrated system in a package (SiP)
    technology, the LTM9004 is a ОјModuleВ® receiver that
    includes a dual high speed 14-bit A/D converter, lowpass
    filter, differential gain stages and a quadrature demodulator. Contact Linear Technology regarding customization. n Applications Telecommunications Direct Conversion Receivers
    n Cellular Basestations
    n The LTM9004 is perfect for zero-IF communications
    applications, with AC performance that includes 76dB ...

Prices

Packaging

Parametrics

LTM9004CV-AA#PBFLTM9004IV-AA#PBF
ADCs22
ArchitecturePipelinePipeline
Bits, bits1414
Number of Channels11
Demo BoardsDC1513B-AA,DC1513B-AB,DC1513B-AC,DC1513B-ADDC1513B-AA,DC1513B-AB,DC1513B-AC,DC1513B-AD
Export Controlnono
FeaturesIntegrated I/Q Demodulator, Clock Duty Cycle StabilizerIntegrated I/Q Demodulator, Clock Duty Cycle Stabilizer
I/OParallel CMOSParallel CMOS
Input DriveSingle-EndedSingle-Ended
Internal Referenceyesyes
Latency55
Operating Temperature Range, °C0 to 70-40 to 85
Power, mW18301830
SFDR, dB63.563.5
SINAD, dB58.558.5
SNR, dB76.176.1
Simultaneousyesyes
Speed, ksps125000125000
Supply Voltage Range5V, 3.0V5V, 3.0V

Eco Plan

LTM9004CV-AA#PBFLTM9004IV-AA#PBF
RoHSCompliantCompliant

Other Options

LTM9004-AB LTM9004-AC LTM9004-AD

Articles

  • Download » Articles - LT Journal PDF, 2.4 Mb, File published: Jan 20, 2012
    UMTS Base Station Receiver Fits in Half-Inch Square
    Docket ↓
    design features UMTS Base Station Receiver Fits in Half-Inch Square
    Douglas Stuetzle and Todd Nelson How much integration is possible while still meeting
    macrocell base station performance requirements? Process
    technology dictates that certain key functions are produced
    in specific processes: GaAs and SiGe in the RF realm,
    fine-line CMOS for high speed ADCs, and high-Q filters
    cannot be implemented well in semiconductor materials.
    Yet the market continues to demand higher integration.
    With that in mind, Linear Technology
    has applied system-in-package (SiP)
    technology to build a receiver occupying about one-half square inch (just over
    3cm2). The boundaries of the receiver
    are the 50О© RF input, the 50О© LO input,
    the ADC clock input and the digital
    ADC output. This leaves the low noise
    amplifier (LNA) and RF filtering to be
    added for the input, LO and clock generation, and digital processing of the digital
    output. Within the 15mm Г— 22mm package is a signal chain utilizing SiGe high frequency components, discrete passive filtering and fine-line CMOS ADCs.
    This article presents a design analysis for
    the LTM9004 ВµModuleВ® receiver implementing a direct conversion receiver.
    DESIGN TARGETS The design target is a Universal Mobile
    Telecommunications System (UMTS)
    uplink Frequency Division Duplex ...

Moldel Line

Series: LTM9004-AA (2)

Manufacturer's Classification

  • Data Conversion > Signal Chain µModule Receivers
  • Data Conversion > Analog-to-Digital Converters (ADC) > High Speed ADCs (Fs >=10Msps)

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