Datasheet Microchip VP2450
| Manufacturer | Microchip |
| Series | VP2450 |
This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and well-proven, silicon-gate manufacturing process
Datasheets
VP2450 P-Channel Enhancement-Mode Vertical DMOS FET Data Sheet
PDF, 1.1 Mb, Revision: 11-08-2016
Extract from the document
Status
| VP2450N3-G | VP2450N8-G | |
|---|---|---|
| Lifecycle Status | Production (Appropriate for new designs but newer alternatives may exist) | Production (Appropriate for new designs but newer alternatives may exist) |
Packaging
| VP2450N3-G | VP2450N8-G | |
|---|---|---|
| N | 1 | 2 |
| Package | TO-92 | SOT-89 |
| Pins | 3 | 3 |
Parametrics
| Parameters / Models | VP2450N3-G | VP2450N8-G |
|---|---|---|
| BVdss min, V | -500 | -500 |
| CISSmax, pF | 190 | 190 |
| Operating Temperature Range, °C | -55 to +150 | -55 to +150 |
| Rds, on) max | 30 | 30 |
| Vgs(th) max, V | -3.5 | -3.5 |
Eco Plan
| VP2450N3-G | VP2450N8-G | |
|---|---|---|
| RoHS | Compliant | Compliant |
Model Line
Series: VP2450 (2)