Ultra-Precision 1:8 LVDS Fanout Buffer
with Three Г 1/Г 2/Г 4 Clock Divider
Revision 6.0 General Description
The SY89200U is a 2.5V precision, high-speed, integrated
clock divider and LVDS fanout buffer capable of handling
clocks up to 1.5GHz. Optimized for communications
applications, the three independently controlled output
banks are phase matched and can be configured for pass
through (Г 1), Г 2 or Г 4 divider ratios.
The differential input includes MicrelвЂ™s unique, 3-pin input
termination architecture that allows the user to interface to
any differential signal path. The low-skew, low-jitter
outputs are LVDS-compatible with extremely fast rise/fall
times guaranteed to be less than 150ps.
The EN (enable) input guarantees that the Г 1, Г 2 and Г 4
outputs will start from the same state without any runt
pulse after an asynchronous master rest (MR) is asserted.
This is accomplished by enabling the outputs after a fourclock delay to allow the counters to synchronize.
The SY89200U is part of MicrelвЂ™s Precision EdgeВ® product
Datasheets and support documentation are available on …