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Datasheet Microchip PL520-30

ManufacturerMicrochip
SeriesPL520-30

The PL520-30 is a VCXO IC specifically designed to pull frequency fundamental crystals from 65MHz to 130MHz, with selectable PECL or LVDS outputs and OE logic (enable high or enable low)

Datasheets

  • Download » Datasheet PDF, 327 Kb, File published: Nov 9, 2015
    PL520-30 - PECL and LVDS Low Phase Noise VCXO (for 65-13MHz Fund Xtal)
    Docket ↓
    PL520-30
    PECL and LVDS Low Phase Noise VCXO (for 65 -130MHz Fund Xtal)
    DIE CONFIGURATION FEATURES DESCRIPTION BLOCK DIAGRAM
    OE OESEL^ VDD VDD VDD VDD N/C Reserved Reserved 24 23 22 21 20 19 18 17 26 Die ID:
    A1313-13B XOUT 27 N/C 28 N/C 29 OE
    CTRL 30 VCON 31 Amplifier
    w/
    integrated
    varicaps 4 5 6 GND GND Reserved X 7 8 GNDBUF 3 GNDBUF 2 GND (0,0) 16 N/C 15 LVDSB 14 PECLB 13
    12 VDDBUF
    VDDBUF 11 PECL 10 LVDS
    OUTSEL^ DIE SPECIFICATIONS
    Name Value Size
    Reverse side
    Pad dimensions
    Thickness 62 x 65 m il
    GND
    80 m icron x 80 micron
    10 m il OUTPUT SELECTION AND ENABLE
    OUTSEL
    (Pad #9) Q 0
    1 PL520-30 GNDBUF 9
    1 GND Y Q VCON Oscillator XOUT 25 C502A The PL520-30 is a VCXO IC specifically designed to ...

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Manufacturer's Classification

  • Clock and Timing > Oscillator > Oscillator Die

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