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Datasheet Microchip KSZ8864RMNUB

ManufacturerMicrochip
SeriesKSZ8864
Part NumberKSZ8864RMNUB

The KSZ8864RMN is a highly-integrated, Layer 2 managed 4-port switch with optimized design, plentiful features and smallest package size

Datasheets

  • Download » Datasheet, PDF, 1.3 Mb, 08-02-2016
    KSZ8864CNX_RMNUB Integrated 4-Port 10/100 Mgd Switch with 2 MACs MII or RMII Int
    Docket ↓
    KSZ8864CNX/RMNUB
    Integrated 4-Port 10/100 Managed Switch with
    Two MACs MII or RMII Interfaces
    Features
    Advanced Switch Features IEEE 802.1q VLAN Support for up to 128 VLAN
    Groups (Full-Range 4096 of VLAN IDs) Static MAC Table Supports up to 32 Entries VLAN ID Tag/Untagged Options, Per Port Basis IEEE 802.1p/q Tag Insertion or Removal on a Per
    Port Basis Based on Ingress Port (Egress) Programmable Rate Limiting at the Ingress and
    Egress on a Per Port Basis Jitter-Free Per Packet Based Rate Limiting Support Broadcast Storm Protection with Percentage Control (Global and Per Port Basis) IEEE 802.1d Rapid Spanning Tree Protocol RSTP
    Support Tail Tag Mode (1 Byte Added Before FCS) Support at Port 4 to Inform the Processor Which
    Ingress Port Receives the Packet 1.4 Gbps High-Performance Memory Bandwidth
    and Shared Memory Based Switch Fabric with
    Fully Non-Blocking Configuration Dual MII/RMII with MAC 3 SW3-MII/RMII and
    MAC 4 SW4-MII/RMII Interfaces Enable/Disable Option for Huge Frame Size up to
    2000 Bytes Per Frame IGMP v1/v2 Snooping (IPv4) Support for Multicast
    Packet Filtering IPv4/IPv6 QoS Support Support Unknown Unicast/Multicast Address and
    Unknown VID Packet Filtering Self-Address Filtering
    Comprehensive Configuration Register Access Serial Management Interface (MDC/MDIO) to All
    PHYs Registers and SMI Interface (MDC/MDIO)
    to All Registers High-Speed SPI (up to 25 MHz) and I2C Master
    Interface to all Internal Registers I/O Pins Strapping and EEPROM to Program
    Selective Registers in Unmanaged Switch Mode Control Registers Configurable on the Fly (PortPriority, 802.1p/d/q, AN…)
    QoS/CoS Packet Prioritization Support Per Port, 802.1p and DiffServ-Based 1/2/4-Queue QoS Prioritization Selection
    пѓЈ 2016 Microchip Technology Inc. Programmable Weighted Fair Queuing for Ratio ...

Prices

Status

Lifecycle StatusProduction (Appropriate for new designs but newer alternatives may exist)

Packaging

PackageVQFN
Pins64

Parametrics

# Ethernet Ports4
Automotive GradeYes
Cable DiagnosticsYes
EEENo
Ethernet Bandwidth10/100Mbps
Fiber SupportNo
IEEE 1588No
InterfaceMII(2)/RMII(2)
Interrupt PinYes
LEDs4
On-Chip TerminationYes
Op. Voltage3.3 V
Temp Range Max.(° C)85
Temp Range Min.(° C)-40
Vdd I/O1.8/2.5/3.3 V
WOLNo

Eco Plan

RoHSCompliant

Moldel Line

Series: KSZ8864 (12)

Manufacturer's Classification

  • High-Speed Networking and Video > Ethernet > Ethernet Switches
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