Datasheet Analog Devices HMC564

HMC564
v02.0618 LOW NOISE AMPLIFIERS -CHIP GaAs PHEMT MMIC LOW NOISE
AMPLIFIER, 7 -13.5 GHz
Typical Applications Features The HMC564 is ideal for use as a LNA or driver amplifier for: Noise Figure: 1.8 dB • Point-to-Point Radios OIP3: 24 dBm • Point-to-Multi-Point Radios Single Supply: +3V @ 51 mA • Test Equipment and Sensors 50 Ohm Matched Input/Output • Military & Space Small Size: 1.96 x 0.98 x 0.10 mm Functional Diagram General Description Gain: 17 dB The HMC564 is a high dynamic range GaAs PHEMT
MMIC Low Noise Amplifier (LNA) chip which operates
from 7 to 13.5 GHz. The HMC564 features extremely
flat performance characteristics including 17 dB of
small signal gain, 1.8 dB of noise figure and output
IP3 of 24 dBm across the operating band. This selfbiased LNA is ideal for hybrid and MCM assemblies
due to its compact size, consistent output power,
single +3V supply operation, and DC blocked RF I/O’s.
All data is measured with the chip in a 50 Ohm test
fixture connected via two 0.025 mm (1 mil) diameter
bondwires of minimal length 0.31 mm (12 mil). Electrical Specifications, TA = +25° C, Vdd 1, 2 = +3V
Parameter Min. Frequency Range
Gain 14 Gain Variation Over Temperature
Noise Figure Max. Units
GHz 17 dB 0.02 0.03 dB/ °C 1.8 2.2 dB Input Return Loss 15 Output Return Loss 16 dB 12 dBm 14.5 dBm Output Third Order Intercept (IP3) 24 dBm Supply Current (Idd)(Vdd = +3V) 51 mA Output Power for 1 dB Compression (P1dB)
Saturated Output Power (Psat) 1 Typ.
7 -13.5 Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
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