AD818DIFFERENTIAL LINE RECEIVERA HIGH SPEED, 3-OP AMP IN AMP The differential receiver circuit of Figure 9 is useful for many The circuit of Figure 11 uses three high speed op amps: two applications—from audio to video. It allows extraction of a low AD818s and an AD817. This high speed circuit lends itself well level signal in the presence of common-mode noise, as shown in to CCD imaging and other video speed applications. It has the Figure 10. optional flexibility of both dc and ac trims for common-mode rejection, plus the ability to adjust for minimum settling time. 2pFEACH AMPLIFIER1k ⍀ 1k ⍀ PIN 7VB+15V+VSEACH+5VAMPLIFIER10 F0.1 F1 F0.1 F0.01 F2.2 FCOMMON10 F0.1 F1 F0.1 FDIFFERENTIALAD818OUTPUTPIN 4INPUTVOUT–15V–VSEACH AMPLIFIER0.01 F2.2 F–5V–VINA1SETTLING1k ⍀ 1k ⍀ AD818TIME AC2pF–8pFVACMR ADJUST2pF1k ⍀ 1k ⍀ Figure 9. Differential Line Receiver 1k ⍀ 5pFVOUTA32pFRGAD8181k ⍀ 5pFRL 2k ⍀ 3pF1001k ⍀ 970 ⍀ 20ns901VA250V ⍀ AAD818DC CMR+VINADJUSTBANDWIDTH, SETTLING TIME, AND TOTAL HARMONIC DISTORTION VS. GAIN2V10SMALLSETTLINGTHD + NOISE0%CADJSIGNALTIMEBELOW INPUT LEVELGAINRG(pF)BANDWIDTHTO 0.1%@ 10kHzOUTPUT31k ⍀ 2–814.7MHz200ns82dB10222 ⍀ 2–84.5MHz370ns81dB10020 ⍀ 2–8960kHz2.5 s71dB Figure 10. Performance of Line Receiver, RL = 150 W, G = +2 Figure 11. High Speed 3-Op Amp In Amp REV. D –13– Document Outline Untitled