Datasheet LTC1042 (Analog Devices) - 5

LTC1042
U U W U APPLICATIO S I FOR ATIO
To synchronize the sampling of the LTC1042 to an external lAVG = VIN x CIN x fS, where fS is the sampling frequency. frequency source, the OSC pin can be driven by a CMOS Because the input current is directly proportional to the gate. A CMOS gate is necessary because the input trip differential input voltage, the LTC1042 can be said to have points of the oscillator are close to the supply rails and TTL an average input resistance of RIN = VIN/IAVG = 1/(fS x CIN). does not have enough output swing. Externally driven, Since two comparator inputs are connected in parallel, R there will be a delay from the rising edge of the OSC input IN is one half this value (see typical curve of R and the start of the sampling cycle of approximately 5µs. IN vs Sampling Frequency). This finite input resistance causes an error due to voltage divided between R
Input Impedance
S and RIN. The input error caused by both of these effects is The input impedance of the LTC1042 does not look like a V classic linear comparator; CMOS switches and a precision ERROR = VIN[2CIN/(2CIN +

CS) +

RS/(RS +

RIN)]. capacitor array form the dual differential input structure. EXAMPLE: Assume fS = 10Hz, RS = 1MΩ, CS = 1µF and Input impedance characteristics can be determined from VIN = 1V. Then VERROR = 1V(66µV +

660µV) = 726µV. If the the equivalent circuit shown in Figure 2. The input sampling frequency is reduced to 1Hz, the voltage error capacitance will charge with a time constant of RS • CIN. It from input impedance effects is reduced to 136µV. is critical, in determining errors caused by the input charging current, that C
Input Voltage Range
IN be fully charged during the “active” time. The input switches of the LTC1042 are capable of switching either to the V+ supply or ground. Consequently,
For RS
≤
10k
Ω the input voltage range includes both supply rails. This is For Rs less than or equal to 10kΩ, CIN fully charges and no a further benefit of the input sampling structure. error is caused by the charging current.
Error Specifications For RS > 10k
Ω The only measurable errors on the LTC1042 are the For source resistances greater than 10kΩ, CIN cannot fully deviations from “ideal” of the upper and lower window charge, causing voltage errors. To minimize these errors limits [Figure 1(B)]. The critical parameters for a window an input bypass capacitor, CS should be used. Charge is comparator are the width and center of the window. These shared between CIN and CS causing a voltage error. The errors may be expressed in terms of VU and VL. magnitude of this error is ∆V = VIN x CIN/(CIN + CS). This center error = [(V error can be made arbitrarily small by increasing C U +

VL)/2] – CENTER S. width error = (V The averaging effect of the bypass capacitor C U – VL) – 2 x (WIDTH/2) S causes another error term. Each time the input switches cycle The specified error limits (see Electrical Characteristics) between the plus and minus inputs, C include error due to offset, power supply variation, gain, IN is charged and discharged. The average input current due to this is time and temperature. CIN (~33pF) ~ R S1 S + VIN CS S2 – V– LTC1042 DIFFERENTIAL INPUT LTC1042 • AI02
Figure 2. Equivalent Input Circuit
1042fa 5