Datasheet MCP6286 (Microchip) - 17

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MCP6286 4.6 Application Circuits
4.6.2 PHOTO DETECTION The MCP6286 op amps can be used to easily convert 4.6.1 ACTIVE LOW-PASS FILTER the signal from a sensor that produces an output The MCP6286 op amp’s low input bias current makes current (such as a photo diode) into a voltage (a it possible for the designer to use larger resistors and transimpedance amplifier). This is implemented with a smaller capacitors for active low-pass filter single resistor (R2) in the feedback loop of the applications. However, as the resistance increases, the amplifiers shown in Figure 4-8 and Figure 4-9. The noise generated also increases. Parasitic capacitances optional capacitor (C2) sometimes provides stability for and the large value resistors could also modify the these circuits. frequency response. These trade-offs need to be A photodiode configured in the Photovoltaic mode has considered when selecting circuit elements. zero voltage potential placed across it (Figure 4-8). In Figure 4-6 and Figure 4-7 show low-pass, this mode, the light sensitivity and linearity is second-order, Butterworth filters with a cut-off maximized, making it best suited for precision frequency of 10 Hz. The filter in Figure 4-6 has a applications. The key amplifier specifications for this non-inverting gain of +1 V/V, and the filter in Figure 4-7 application are: low input bias current, low noise, has an inverting gain of -1 V/V. common mode input voltage range (including ground), and rail-to-rail output. C G = +1 V/V 1 C2 47 nF fP = 10 Hz R2 R R 1 2 VOUT I 382 kΩ 641 kΩ D1 VDD V – IN + D1 C2
MCP6286
VOUT Light
MCP6286
22 nF – + VOUT = ID1*R2
FIGURE 4-6:
Second-Order, Low-Pass Butterworth Filter with Sallen-Key Topology.
FIGURE 4-8:
Photovoltaic Mode Detector. In contrast, a photodiode that is configured in the Photoconductive mode has a reverse bias voltage G = -1 V/V across the photo-sensing element (Figure 4-9). This R2 fP = 10 Hz decreases the diode capacitance, which facilitates 618 kΩ high-speed operation (e.g., high-speed digital communications). The design trade-off is increased R R 1 3 C1 diode leakage current and linearity errors. The op amp 618 kΩ 1.00 MΩ 8.2 nF needs to have a wide Gain Bandwidth Product V V IN OUT (GBWP). C 2 – 47 nF
MCP6286
C2 VDD/2 + R2 ID1 V
FIGURE 4-7:
Second-Order, Low-Pass OUT VDD Butterwork Filter with Multiple-Feedback – D Topology. 1 Light
MCP6286
V + V BIAS OUT = ID1*R2 VBIAS < 0V
FIGURE 4-9:
Photoconductive Mode Detector. © 2009 Microchip Technology Inc. DS22196A-page 17 Document Outline 1.0 Electrical Characteristics 1.1 Absolute Maximum Ratings † 1.2 Test Circuits FIGURE 1-1: AC and DC Test Circuit for Most Specifications. 2.0 Typical Performance Curves FIGURE 2-1: Input Offset Voltage. FIGURE 2-2: Input Offset Voltage Drift. FIGURE 2-3: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 5.5V. FIGURE 2-4: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 2.2V. FIGURE 2-5: Input Offset Voltage vs. Output Voltage. FIGURE 2-6: Input Offset Voltage vs. Power Supply Voltage with VCM = VCMR_L. FIGURE 2-7: Input Offset Voltage vs. Power Supply Voltage with VCM = VCMR_H. FIGURE 2-8: Input Noise Voltage Density vs. Frequency. FIGURE 2-9: Input Noise Voltage Density vs. Common Mode Input Voltage. FIGURE 2-10: CMRR, PSRR vs. Frequency. FIGURE 2-11: CMRR, PSRR vs. Ambient Temperature. FIGURE 2-12: Common Mode Input Voltage Headroom vs. Ambient Temperature. FIGURE 2-13: Input Bias, Offset Currents vs. Ambient Temperature. FIGURE 2-14: Input Bias Current vs. Common Mode Input Voltage. FIGURE 2-15: Quiescent Current vs Ambient Temperature. FIGURE 2-16: Quiescent Current vs. Power Supply Voltage. FIGURE 2-17: Open-Loop Gain, Phase vs. Frequency. FIGURE 2-18: Gain Bandwidth Product, Phase Margin vs. Common Mode Input Voltage with VDD = 5.5V. FIGURE 2-19: Gain Bandwidth Product, Phase Margin vs. Common Mode Input Voltage with VDD = 2.2V. FIGURE 2-20: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature with VDD = 5.5V. FIGURE 2-21: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature with VDD = 2.2V. FIGURE 2-22: Ouput Short Circuit Current vs. Power Supply Voltage. FIGURE 2-23: Output Voltage Swing vs. Frequency. FIGURE 2-24: Output Voltage Headroom vs. Output Current. FIGURE 2-25: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-26: Slew Rate vs. Ambient Temperature. FIGURE 2-27: Small Signal Non-Inverting Pulse Response. FIGURE 2-28: Small Signal Inverting Pulse Response. FIGURE 2-29: Large Signal Non-Inverting Pulse Response. FIGURE 2-30: Large Signal Inverting Pulse Response. FIGURE 2-31: The MCP6286 Shows No Phase Reversal. FIGURE 2-32: Closed Loop Output Impedance vs. Frequency. FIGURE 2-33: Measured Input Current vs. Input Voltage (below VSS). 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Output 3.2 Analog Inputs 3.3 Power Supply Pins 4.0 Application Information 4.1 Input FIGURE 4-1: Simplified Analog Input ESD Structures. FIGURE 4-2: Protecting the Analog Inputs. 4.2 Rail-to-Rail Output 4.3 Capacitive Loads FIGURE 4-3: Output Resistor, RISO Stabilizes Large Capacitive Loads. FIGURE 4-4: Recommended RISO Values for Capacitive Loads. 4.4 Supply Bypass 4.5 PCB Surface Leakage FIGURE 4-5: Example Guard Ring Layout for Inverting Gain. 4.6 Application Circuits FIGURE 4-6: Second-Order, Low-Pass Butterworth Filter with Sallen-Key Topology. FIGURE 4-7: Second-Order, Low-Pass Butterwork Filter with Multiple-Feedback Topology. FIGURE 4-8: Photovoltaic Mode Detector. FIGURE 4-9: Photoconductive Mode Detector. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab® Software 5.3 Mindi™ Circuit Designer & Simulator 5.4 Microchip Advanced Part Selector (MAPS) 5.5 Analog Demonstration and Evaluation Boards 5.6 Application Notes 6.0 Packaging Information 6.1 Package Marking Information