Datasheet AD7617 (Analog Devices) - 9

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AD7617 Data Sheet CONVST BUSY t t RD_HIGH RD_HOLD tDOUT_3STATE CS RD DB0 TO CONV A CONV B DB15 t t
4
RD_SETUP RD_LOW
10
tDOUT_SETUP
6077- 1 Figure 4. Parallel Read Timing Diagram
tWR_SETUP tCONF_SETTLE CONVST CS t t WR_HIGH WR_HOLD WR t t DIN_HOLD WR_LOW DB0 TO WRITE REG 1 WRITE REG 2 DB15
105
t
077-
DIN_SETUP
16 Figure 5. Parallel Write Timing Diagram
Serial Mode Timing Specifications Table 4. Parameter Min Typ Max Unit Description
f 1 SCLK

40/50

MHz

SCLK frequency

tSCLK 1/fSCLK

Minimum SCLK period t 1 SCLK_SETUP 10.5 ns CS to SCLK falling edge setup time, VDRIVE above 3 V 13.5 ns CS to SCLK falling edge setup time, VDRIVE above 2.3 V tSCLK_HOLD 10 ns SCLK to CS rising edge hold time tSCLK_LOW 8 ns SCLK low pulse width tSCLK_HIGH 9 ns SCLK high pulse width t 1 DOUT_SETUP 9 ns Data out access time after SCLK rising edge, VDRIVE above 3 V 11 ns Data out access time after SCLK rising edge, VDRIVE above 2.3 V tDOUT_HOLD 4 ns Data out hold time after SCLK rising edge tDIN_SETUP 10 ns Data in setup time before SCLK falling edge tDIN_HOLD 8 ns Data in hold time after SCLK falling edge tDOUT_3STATE 10 ns CS rising edge to SDOx high impedance 1 Dependent on VDRIVE and CLOAD (see Table 15). Rev. 0 | Page 8 of 51 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS Universal Timing Specifications Parallel Mode Timing Specifications Serial Mode Timing Specifications ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CONVERTER DETAILS ANALOG INPUT Analog Input Channel Selection Analog Input Ranges Analog Input Impedance Analog Input Clamp Protection Analog Input Antialiasing Filter ADC TRANSFER FUNCTION INTERNAL/EXTERNAL REFERENCE SHUTDOWN MODE DIGITAL FILTER APPLICATIONS INFORMATION FUNCTIONALITY OVERVIEW POWER SUPPLIES TYPICAL CONNECTIONS DEVICE CONFIGURATION OPERATIONAL MODE INTERNAL/EXTERNAL REFERENCE DIGITAL INTERFACE HARDWARE MODE SOFTWARE MODE RESET FUNCTIONALITY PIN FUNCTION OVERVIEW DIGITAL INTERFACE CHANNEL SELECTION Hardware Mode Software Mode PARALLEL INTERFACE Reading Conversion Results Writing Register Data Reading Register Data SERIAL INTERFACE Reading Conversion Results Writing Register Data Reading Register Data SEQUENCER HARDWARE MODE SEQUENCER SOFTWARE MODE SEQUENCER BURST SEQUENCER Hardware Mode Burst Software Mode Burst DIAGNOSTICS DIAGNOSTIC CHANNELS INTERFACE SELF TEST CRC REGISTER SUMMARY ADDRESSING REGISTERS CONFIGURATION REGISTER CHANNEL REGISTER INPUT RANGE REGISTERS Input Range Register A1 Input Range Register A2 Input Range Register B1 Input Range Register B2 SEQUENCER STACK REGISTERS STATUS REGISTER OUTLINE DIMENSIONS ORDERING GUIDE