Datasheet LTC1416 (Analog Devices)

ManufacturerAnalog Devices
DescriptionLow Power 14-Bit, 400ksps Sampling ADC
Pages / Page20 / 1 — FEATURES. DESCRIPTIO. Sample Rate: 400ksps. Power Dissipation: 70mW. …
File Format / SizePDF / 338 Kb
Document LanguageEnglish

FEATURES. DESCRIPTIO. Sample Rate: 400ksps. Power Dissipation: 70mW. Guaranteed. 1.5LSB DNL,. 2LSB INL (Max)

Datasheet LTC1416 Analog Devices

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LTC1416 Low Power 14-Bit, 400ksps Sampling ADC
U FEATURES DESCRIPTIO

Sample Rate: 400ksps
The LTC®1416 is a 2.2µs, 400ksps, 14-bit sampling A/D ■
Power Dissipation: 70mW
converter that draws only 70mW from ±5V supplies. This ■
Guaranteed
±
1.5LSB DNL,
±
2LSB INL (Max)
easy-to-use device includes a high dynamic range sample- ■
80.5dB S/(N + D) and 93dB THD at 100kHz
and-hold and a precision reference. Two digitally select- ■
80dB S/(N + D) and 90dB THD at Nyquist
able power shutdown modes provide flexibility for low ■ Nap and Sleep Shutdown Modes power systems. ■ Operates with Internal or External Reference The LTC1416’s full-scale input range is ±2.5V. Maximum ■ True Differential Inputs Reject Common Mode Noise DC specifications include ±2LSB INL, ±1.5LSB DNL over ■ 15MHz Full Power Bandwidth Sampling temperature. Outstanding AC performance includes 80.5dB ■ ±2.5V Bipolar Input Range S/(N + D) and 93dB THD with a 100kHz input, and 80dB ■ 28-Pin SSOP Package S/(N + D) and 90dB THD at the Nyquist input frequency of 200kHz.
U APPLICATIO S
The unique differential input sample-and-hold can ac- ■ Telecommunications quire single-ended or differential input signals up to its 15MHz bandwidth. The 60dB common mode rejection ■ Digital Signal Processing allows users to eliminate ground loops and common ■ Multiplexed Data Acquisition Systems mode noise by measuring signals differentially from the ■ High Speed Data Acquisition source. ■ Spectrum Analysis ■ Imaging Systems The ADC has a µP compatible, 14-bit parallel output port. There is no pipeline delay in the conversion , LTC and LT are registered trademarks of Linear Technology Corporation. results. A separate convert start input and a data ready signal (BUSY) ease connections to FIFOs, DSPs and microprocessors.
U TYPICAL APPLICATIO Effective Bits and Complete, 70mW, 14-Bit ADC with 80.5dB S/(N + D) Signal-to-(Noise + Distortion) vs Input Frequency
14 86 10µF AV DV DD DD 13 80 SIGNAL/(NOISE + DISTORTION) (dB) LTC1416 12 74 14 11 NYQUIST 68 FREQUENCY A + IN 10 62 OUTPUT • D13 (MSB) S/H 14-BIT ADC • 9 BUFFERS • – D0 (LSB) A 8 IN 7 REFCOMP 6 BUFFER 22 BUSY µF EFFECTIVE BITS 5 TIMING CS 4k 4 2.5V AND CONVST VREF 3 REFERENCE LOGIC RD 1µF SHDN 2 1 fSAMPLE = 400kHz VSS AGND DGND 0 1416 TA01 1k 10k 100k 1M 2M 10µF INPUT FREQUENCY (Hz) –5V 1416 TA02 1
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