Datasheet LTC1420 (Analog Devices) - 4
| Manufacturer | Analog Devices |
| Description | 12-Bit, 10Msps, Sampling ADC |
| Pages / Page | 20 / 4 — POWER REQUIRE E TS The. denotes the specifications which apply over the … |
| File Format / Size | PDF / 257 Kb |
| Document Language | English |
POWER REQUIRE E TS The. denotes the specifications which apply over the full operating temperature
Model Line for this Datasheet
Text Version of Document
LTC1420
W U POWER REQUIRE E TS The
●
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25
°
C. Specifications are guaranteed for both dual supply and single supply operation. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VDD Positive Supply Voltage (Note 10) 4.75 5.25 V OVDD Output Supply Voltage (Note 10) 2.7 5.25 V VSS Negative Supply Voltage Dual Supply Mode – 5.25 – 4.75 V Single Supply Mode 0 V IDD Positive Supply Current ● 48 58 mA ISS Negative Supply Current ● 1.4 2.5 mA PD Power Dissipation ● 250 300 mW
W U TI I G CHARACTERISTICS The
●
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25
°
C. Specifications are guaranteed for both dual supply and single supply operation. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
fSAMPLE Maximum Sampling Frequency ● 0.02 10 MHz tCONV Conversion Time ● 70 90 ns tACQ Acquisition Time ● 10 30 ns tH CLK High Time ● 20 50 ns tL CLK Low Time ● 20 50 ns tAP Aperature Delay of Sample-and-Hold – 250 ps
Note 1:
Absolute Maximum Ratings are those values beyond which the life
Note 5:
VDD = 5V, VSS = – 5V or 0V, fSAMPLE = 10MHz, tr = tf = 5ns unless of a device may be impaired. otherwise specified.
Note 2:
All voltage values are with respect to ground with GND and OGND
Note 6:
Dynamic specifications are guaranteed for dual supply operation wired together (unless otherwise noted). with a single-ended + AIN input and – AIN grounded. For single supply
Note 3:
When these pin voltages are taken below V dynamic specifications, refer to the Typical Performance Characteristics. SS or above VDD, they will be clamped by internal diodes. This product can handle input currents
Note 7:
Integral nonlinearity is defined as the deviation of a code from a greater than 100mA below VSS or above VDD without latchup. straight line passing through the actual endpoints of the transfer curve.
Note 4:
When these pin voltages are taken below V The deviation is measured from the center of the quantization band. SS they will be clamped by internal diodes. This product can handle input currents greater than
Note 8:
Bipolar offset is the offset voltage measured from –0.5LSB 100mA below VSS without latchup. GAIN is not clamped to VDD. When CLK when the output code flickers between 0000 0000 0000 and is taken above VDD, it will be clamped by an internal diode. The CLK pin 1111 1111 1111. can handle input currents of greater than 100mA above VDD without
Note 9:
Guaranteed by design, not subject to test. latchup.
Note 10:
Recommended operating conditions. 1420fa 4
W U POWER REQUIRE E TS The
●
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25
°
C. Specifications are guaranteed for both dual supply and single supply operation. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VDD Positive Supply Voltage (Note 10) 4.75 5.25 V OVDD Output Supply Voltage (Note 10) 2.7 5.25 V VSS Negative Supply Voltage Dual Supply Mode – 5.25 – 4.75 V Single Supply Mode 0 V IDD Positive Supply Current ● 48 58 mA ISS Negative Supply Current ● 1.4 2.5 mA PD Power Dissipation ● 250 300 mW
W U TI I G CHARACTERISTICS The
●
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25
°
C. Specifications are guaranteed for both dual supply and single supply operation. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
fSAMPLE Maximum Sampling Frequency ● 0.02 10 MHz tCONV Conversion Time ● 70 90 ns tACQ Acquisition Time ● 10 30 ns tH CLK High Time ● 20 50 ns tL CLK Low Time ● 20 50 ns tAP Aperature Delay of Sample-and-Hold – 250 ps
Note 1:
Absolute Maximum Ratings are those values beyond which the life
Note 5:
VDD = 5V, VSS = – 5V or 0V, fSAMPLE = 10MHz, tr = tf = 5ns unless of a device may be impaired. otherwise specified.
Note 2:
All voltage values are with respect to ground with GND and OGND
Note 6:
Dynamic specifications are guaranteed for dual supply operation wired together (unless otherwise noted). with a single-ended + AIN input and – AIN grounded. For single supply
Note 3:
When these pin voltages are taken below V dynamic specifications, refer to the Typical Performance Characteristics. SS or above VDD, they will be clamped by internal diodes. This product can handle input currents
Note 7:
Integral nonlinearity is defined as the deviation of a code from a greater than 100mA below VSS or above VDD without latchup. straight line passing through the actual endpoints of the transfer curve.
Note 4:
When these pin voltages are taken below V The deviation is measured from the center of the quantization band. SS they will be clamped by internal diodes. This product can handle input currents greater than
Note 8:
Bipolar offset is the offset voltage measured from –0.5LSB 100mA below VSS without latchup. GAIN is not clamped to VDD. When CLK when the output code flickers between 0000 0000 0000 and is taken above VDD, it will be clamped by an internal diode. The CLK pin 1111 1111 1111. can handle input currents of greater than 100mA above VDD without
Note 9:
Guaranteed by design, not subject to test. latchup.
Note 10:
Recommended operating conditions. 1420fa 4
