Datasheet LTC2400 (Analog Devices) - 10
| Manufacturer | Analog Devices |
| Description | 24-Bit µPower No Latency ∆Σ™ ADC in SO-8 |
| Pages / Page | 40 / 10 — APPLICATIONS INFORMATION. Power-Up Sequence. Conversion Clock. Reference … |
| File Format / Size | PDF / 481 Kb |
| Document Language | English |
APPLICATIONS INFORMATION. Power-Up Sequence. Conversion Clock. Reference Voltage Range. Input Voltage Range. Ease of Use
Model Line for this Datasheet
Text Version of Document
LTC2400
U U W U APPLICATIONS INFORMATION
an order of magnitude. The part remains in the sleep state conversion and the output data. Therefore, multiplexing as long as CS is logic HIGH. The conversion result is held an analog input voltage is easy. indefinitely in a static shift register while the converter is The LTC2400 performs offset and full-scale calibrations in the sleep state. every conversion cycle. This calibration is transparent to Once CS is pulled low, the device begins outputting the the user and has no effect on the cyclic operation de- conversion result. There is no latency in the conversion scribed above. The advantage of continuous calibration is result. The data output corresponds to the conversion just extreme stability of offset and full-scale readings with re- performed. This result is shifted out on the serial data out spect to time, supply voltage change and temperature drift. pin (SDO) under the control of the serial clock (SCK). Data is updated on the falling edge of SCK allowing the user to
Power-Up Sequence
reliably latch data on the rising edge of SCK, see Figure 3. The LTC2400 automatically enters an internal reset state The data output state is concluded once 32 bits are read when the power supply voltage VCC drops below approxi- out of the ADC or when CS is brought HIGH. The device mately 2.2V. This feature guarantees the integrity of the automatically initiates a new conversion cycle and the conversion result and of the serial interface mode selec- cycle repeats. tion which is performed at the initial power-up. (See the Through timing control of the CS and SCK pins, the 2-wire I/O sections in the Serial Interface Timing Modes LTC2400 offers several flexible modes of operation section.) (internal or external SCK and free-running conversion When the VCC voltage rises above this critical threshold, modes). These various modes do not require program- the converter creates an internal power-on-reset (POR) ming configuration registers; moreover, they do not dis- signal with duration of approximately 0.5ms. The POR turb the cyclic operation described above. These modes of signal clears all internal registers. Following the POR operation are described in detail in the Serial Interface signal, the LTC2400 starts a normal conversion cycle and Timing Modes section. follows the normal succession of states described above. The first conversion result following POR is accurate
Conversion Clock
within the specifications of the device. A major advantage delta-sigma converters offer over conventional type converters is an on-chip digital filter
Reference Voltage Range
(commonly known as Sinc or Comb filter). For high The LTC2400 can accept a reference voltage from 0V to resolution, low frequency applications, this filter is typi- VCC. The converter output noise is determined by the cally designed to reject line frequencies of 50 or 60Hz plus thermal noise of the front-end circuits, and as such, its their harmonics. In order to reject these frequencies in value in microvolts is nearly constant with reference excess of 110dB, a highly accurate conversion clock is voltage. A decrease in reference voltage will not signifi- required. The LTC2400 incorporates an on-chip highly cantly improve the converter’s effective resolution. On the accurate oscillator. This eliminates the need for external other hand, a reduced reference voltage will improve the frequency setting components such as crystals or oscilla- overall converter INL performance. The recommended tors. Clocked by the on-chip oscillator, the LTC2400 range for the LTC2400 voltage reference is 100mV to VCC. rejects line frequencies (50 or 60Hz ±2%) a minimum of 110dB.
Input Voltage Range Ease of Use
The converter is able to accommodate system level offset and gain errors as well as system level overrange situa- The LTC2400 data output has no latency, filter settling or tions due to its extended input range, see Figure 2. The redundant data associated with the conversion cycle. LTC2400 converts input signals within the extended input There is a one-to-one correspondence between the range of – 0.125 • VREF to 1.125 • VREF. 10
U U W U APPLICATIONS INFORMATION
an order of magnitude. The part remains in the sleep state conversion and the output data. Therefore, multiplexing as long as CS is logic HIGH. The conversion result is held an analog input voltage is easy. indefinitely in a static shift register while the converter is The LTC2400 performs offset and full-scale calibrations in the sleep state. every conversion cycle. This calibration is transparent to Once CS is pulled low, the device begins outputting the the user and has no effect on the cyclic operation de- conversion result. There is no latency in the conversion scribed above. The advantage of continuous calibration is result. The data output corresponds to the conversion just extreme stability of offset and full-scale readings with re- performed. This result is shifted out on the serial data out spect to time, supply voltage change and temperature drift. pin (SDO) under the control of the serial clock (SCK). Data is updated on the falling edge of SCK allowing the user to
Power-Up Sequence
reliably latch data on the rising edge of SCK, see Figure 3. The LTC2400 automatically enters an internal reset state The data output state is concluded once 32 bits are read when the power supply voltage VCC drops below approxi- out of the ADC or when CS is brought HIGH. The device mately 2.2V. This feature guarantees the integrity of the automatically initiates a new conversion cycle and the conversion result and of the serial interface mode selec- cycle repeats. tion which is performed at the initial power-up. (See the Through timing control of the CS and SCK pins, the 2-wire I/O sections in the Serial Interface Timing Modes LTC2400 offers several flexible modes of operation section.) (internal or external SCK and free-running conversion When the VCC voltage rises above this critical threshold, modes). These various modes do not require program- the converter creates an internal power-on-reset (POR) ming configuration registers; moreover, they do not dis- signal with duration of approximately 0.5ms. The POR turb the cyclic operation described above. These modes of signal clears all internal registers. Following the POR operation are described in detail in the Serial Interface signal, the LTC2400 starts a normal conversion cycle and Timing Modes section. follows the normal succession of states described above. The first conversion result following POR is accurate
Conversion Clock
within the specifications of the device. A major advantage delta-sigma converters offer over conventional type converters is an on-chip digital filter
Reference Voltage Range
(commonly known as Sinc or Comb filter). For high The LTC2400 can accept a reference voltage from 0V to resolution, low frequency applications, this filter is typi- VCC. The converter output noise is determined by the cally designed to reject line frequencies of 50 or 60Hz plus thermal noise of the front-end circuits, and as such, its their harmonics. In order to reject these frequencies in value in microvolts is nearly constant with reference excess of 110dB, a highly accurate conversion clock is voltage. A decrease in reference voltage will not signifi- required. The LTC2400 incorporates an on-chip highly cantly improve the converter’s effective resolution. On the accurate oscillator. This eliminates the need for external other hand, a reduced reference voltage will improve the frequency setting components such as crystals or oscilla- overall converter INL performance. The recommended tors. Clocked by the on-chip oscillator, the LTC2400 range for the LTC2400 voltage reference is 100mV to VCC. rejects line frequencies (50 or 60Hz ±2%) a minimum of 110dB.
Input Voltage Range Ease of Use
The converter is able to accommodate system level offset and gain errors as well as system level overrange situa- The LTC2400 data output has no latency, filter settling or tions due to its extended input range, see Figure 2. The redundant data associated with the conversion cycle. LTC2400 converts input signals within the extended input There is a one-to-one correspondence between the range of – 0.125 • VREF to 1.125 • VREF. 10
