Datasheet LTC2496 (Analog Devices) - 5

LTC2496
DigiTal inpuTs anD DigiTal ouTpuTs The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
t1 CS↓ to SDO Low l 0 200 ns t2 CS↑ to SDO High Z l 0 200 ns t3 CS↓ to SCK↓ Internal SCK Mode l 0 200 ns t4 CS↓ to SCK↑ External SCK Mode l 50 ns tKQMAX SCK↓ to SDO Valid l 200 ns tKQMIN SDO Hold After SCK↓ (Note 5) l 15 ns t5 SCK Set-Up Before CS↓ l 50 ns t6 SCK Hold After CS↓ l 50 ns t7 SDI Setup Before SCK↑ (Note 5) l 100 ns t8 SDI Hold After SCK↑ (Note 5) l 100 ns
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 10:
The SCK can be configured in external SCK mode or internal SCK may cause permanent damage to the device. Exposure to any Absolute mode. In external SCK mode, the SCK pin is used as a digital input and the Maximum Rating condition for extended periods may affect device driving clock is fESCK. In the internal SCK mode, the SCK pin is used as a reliability and lifetime. digital output and the output clock signal during the data output is fISCK.
Note 2:
All voltage values are with respect to GND.
Note 11:
The external oscillator is connected to the fO pin. The external
Note 3:
V oscillator frequency, f CC = 2.7V to 5.5V unless otherwise specified. EOSC, is expressed in kHz. VREFCM = VREF/2, FS = 0.5VREF
Note 12:
The converter uses its internal oscillator. VIN = IN+ – IN–, VIN(CM) = (IN+ – IN–)/2, where IN+ and IN– are the
Note 13:
The output noise includes the contribution of the internal selected input channels calibration operations.
Note 4:
Use internal conversion clock or external conversion clock source
Note 14:
Guaranteed by design and test correlation. with fEOSC = 307.2kHz unless other wise specified.
Note 15:
The converter is in external SCK mode of operation such that the
Note 5:
Guaranteed by design, not subject to test. SCK pin is used as a digital input. The frequency of the clock signal driving
Note 6:
Integral nonlinearity is defined as the deviation of a code from a SCK during the data output is fESCK and is expressed in Hz. straight line passing through the actual endpoints of the transfer curve.
Note 16:
Refer to Applications Information section for performance vs The deviation is measured from the center of the quantization band. data rate graphs.
Note 7:
fEOSC = 256kHz ±2% (external oscillator).
Note 17:
The converter is in internal SCK mode of operation such that the
Note 8:
fEOSC = 307.2kHz ±2% (external oscillator). SCK pin is used as a digital output.
Note 9:
Simultaneous 50Hz/60Hz (internal oscillator) or fEOSC = 280kHz
Note 18:
For VCC < 3V, VIH is 2.5V for pin fO. ±2% (external oscillator). 2496fc For more information www.linear.com/LTC2496 5 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Converter Characteristics Analog Input and Reference Digital Inputs and Digital Outputs Power Requirements Typical Performance Characteristics Pin Functions Functional Block Diagram Test Circuits Timing Diagrams Applications Information Package Description Revision History Typical Application Related Parts