Datasheet LT3580 (Analog Devices) - 6
| Manufacturer | Analog Devices |
| Description | Boost/Inverting DC/DC Converter with 2A Switch, Soft-Start, and Synchronization |
| Pages / Page | 28 / 6 — BLOCK DIAGRAM. OPERATION |
| File Format / Size | PDF / 302 Kb |
| Document Language | English |
BLOCK DIAGRAM. OPERATION
Model Line for this Datasheet
- LT3580EDD#PBF LT3580EDD#PBF LT3580EDD#TRPBF LT3580EDD#TRPBF LT3580EMS8E#PBF LT3580EMS8E#PBF LT3580EMS8E#TRPBF LT3580EMS8E#TRPBF LT3580HMS8E#PBF LT3580HMS8E#PBF LT3580HMS8E#TRPBF LT3580HMS8E#TRPBF LT3580IDD#PBF LT3580IDD#PBF LT3580IDD#TRPBF LT3580IDD#TRPBF LT3580IMS8E#PBF LT3580IMS8E#PBF LT3580IMS8E#TRPBF LT3580IMS8E#TRPBF LT3580MPMS8E#PBF LT3580MPMS8E#PBF LT3580MPMS8E#TRPBF LT3580MPMS8E#TRPBF
Text Version of Document
LT3580
BLOCK DIAGRAM
RC VIN CSS CC CIN 7 2 SS VC SHDN 5 – 1.3V + DISCHARGE L1 DETECT 275k UVLO SW D1 SR2 VC SOFT- 4 VOUT R START ILIMIT COMPARATOR Q Q2 – SR1 DRIVER VIN S C1 1.215V A3 R Q Q1 3 S REFERENCE + + + RFB 14.6k A1 ∑ A4 0.01Ω – – RAMP GENERATOR FB GND 1 + 9 FREQUENCY ÷N ADJUSTABLE 14.6k A2 FOLDBACK OSCILLATOR – SYNC BLOCK SYNC RT 8 6 RT 3580 BD
OPERATION
The LT3580 uses a constant-frequency, current mode con- voltage (1.215V or 5mV depending on the configuration). trol scheme to provide excellent line and load regulation. In this manner, the error amplifier sets the correct peak Refer to the Block Diagram which shows the LT3580 in a current level to keep the output in regulation. boost configuration. At the start of each oscillator cycle, The LT3580 has a novel FB pin architecture that can be the SR latch (SR1) is set, which turns on the power switch, used for either boost or inverting configurations. When Q1. The switch current flows through the internal current configured as a boost converter, the FB pin is pulled up sense resistor generating a voltage proportional to the to the internal bias voltage of 1.215V by the R switch current. This voltage (amplified by A4) is added FB resistor connected from V to a stabilizing ramp and the resulting sum is fed into the OUT to FB. Comparator A2 becomes inactive and comparator A1 performs the inverting positive terminal of the PWM comparator A3. When this amplification from FB to VC. When the LT3580 is in an voltage exceeds the level at the negative input of A3, the SR inverting configuration, the FB pin is pulled down to 5mV latch is reset, turning off the power switch. The level at the by the R negative input of A3 (VC pin) is set by the error amplifier A1 FB resistor connected from VOUT to FB. Comparator A1 becomes inactive and comparator A2 performs the (or A2) and is simply an amplified version of the difference noninverting amplification from FB to VC. between the feedback voltage (FB pin) and the reference 3580fg 6
BLOCK DIAGRAM
RC VIN CSS CC CIN 7 2 SS VC SHDN 5 – 1.3V + DISCHARGE L1 DETECT 275k UVLO SW D1 SR2 VC SOFT- 4 VOUT R START ILIMIT COMPARATOR Q Q2 – SR1 DRIVER VIN S C1 1.215V A3 R Q Q1 3 S REFERENCE + + + RFB 14.6k A1 ∑ A4 0.01Ω – – RAMP GENERATOR FB GND 1 + 9 FREQUENCY ÷N ADJUSTABLE 14.6k A2 FOLDBACK OSCILLATOR – SYNC BLOCK SYNC RT 8 6 RT 3580 BD
OPERATION
The LT3580 uses a constant-frequency, current mode con- voltage (1.215V or 5mV depending on the configuration). trol scheme to provide excellent line and load regulation. In this manner, the error amplifier sets the correct peak Refer to the Block Diagram which shows the LT3580 in a current level to keep the output in regulation. boost configuration. At the start of each oscillator cycle, The LT3580 has a novel FB pin architecture that can be the SR latch (SR1) is set, which turns on the power switch, used for either boost or inverting configurations. When Q1. The switch current flows through the internal current configured as a boost converter, the FB pin is pulled up sense resistor generating a voltage proportional to the to the internal bias voltage of 1.215V by the R switch current. This voltage (amplified by A4) is added FB resistor connected from V to a stabilizing ramp and the resulting sum is fed into the OUT to FB. Comparator A2 becomes inactive and comparator A1 performs the inverting positive terminal of the PWM comparator A3. When this amplification from FB to VC. When the LT3580 is in an voltage exceeds the level at the negative input of A3, the SR inverting configuration, the FB pin is pulled down to 5mV latch is reset, turning off the power switch. The level at the by the R negative input of A3 (VC pin) is set by the error amplifier A1 FB resistor connected from VOUT to FB. Comparator A1 becomes inactive and comparator A2 performs the (or A2) and is simply an amplified version of the difference noninverting amplification from FB to VC. between the feedback voltage (FB pin) and the reference 3580fg 6
