Datasheet LTC3119 (Analog Devices) - 23

LTC3119
applicaTions inForMaTion
power stage that exhibits a single pole (–20dB/decade) Error Amplifier Compensation (P2, Z1) roll off. The output capacitor (COUT) and load resistance (RLOAD) form the normally dominant low frequency pole fP2 = 1 Hz (close to DC) and the effective series resistance of the output capacitor 2π• REACP1 and its capacitance form a zero, usually at a high enough 1 frequency to be ignored. A potentially troublesome right fZ1= Hz half plane zero (RHPZ) is also encountered if the LTC3119 2π•RZCP1 is operated in boost mode. The RHPZ causes an increase in gain, like a zero, but a decrease in phase, like a pole. Right Half Plane Zero (RHPZ) This will ultimately limit the maximum converter bandwidth V 2 IN •R that can be achieved with the LTC3119. The RHPZ is not f LOAD RHPZ = Hz 2 present when operating in buck mode. The overall open VOUT •2π•L loop gain at DC is the product of the following terms: In some cases it may not be possible to achieve sufficient Voltage Error Amplifier Gain: loop bandwidth and phase margin using a simple RC net- work connected to the V G C pin. In these cases, additional EA = gm • REA = 120µS • 5MΩ = 600 compensation may be required. This is accomplished by the Voltage Divider Gain: addition of a feed forward RC network in parallel with the V top resistor of the feedback divider. A small feed forward FB = 0.795V capacitor alone may be sufficient in some applications. VOUT VOUT A common situation that may require a feed forward net- Current Loop Transconductance: work is when the converter is operating in boost mode 8A and the closed loop crossover frequency (fCC) is close the GCS = = 10.8A / V Right Half Plane Zero (RHPZ). This may be done in order 0.74V to reduce output capacitance requirements by increasing It is important to note that G the loop bandwidth. Due to the phase additions of the CS is the transconductance gain from the control voltage VC to the inductor current RHPZ, a simple compensator on the VC pin may not be level, which equals the output current level in buck mode. able to provide sufficient phase boost to stabilize the loop. In boost mode, the output current level will be reduced by the efficiency divided by the boost ratio. Refer to the
Compensation Example
typical curves for efficiency information. This section will demonstrate how to derive and select the G compensation components for a 5V output supplying 2A CS(OUT) = 10.8A / V (Buck Mode) from an input voltage as low as 3V. Designing compen- sation for most other applications is simply a matter of GCS(OUT) =10.8A / V• VIN •Eff (Boost Mode) substituting in different values to the equations given in VOUT the example and reviewing the resulting Bode Plot, adjust- Frequency dependent terms that affect the loop gain include: ing as needed. Since the compensation design procedure uses a simplified model of the LTC3119, results should Output Load Pole (P1) be checked using time domain step response tests to 1 validate the effectiveness of the compensation chosen. It fP1= is assumed that values and types for capacitors and the 2π•RLOAD •COUT inductor will be selected based on the guidance given elsewhere in this data sheet. Particular attention should 3119fb For more information www.linear.com/LTC3119 23 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Introduction PWM Mode Operation VCC Regulator Current Mode Control Error Amplifiers Current Limit and Zero Current Detection Soft-Start Maximum Power Point Control (MPPC) Burst Mode Operation Power Good Indicator Thermal Considerations Applications Information Typical Applications Package Description Revision History Typical Application Related Parts