Datasheet LTC3400, LTC3400B (Analog Devices) - 4

ManufacturerAnalog Devices
Description600mA, 1.2MHz Micropower Synchronous Boost Converters in ThinSOT
Pages / Page12 / 4 — PI FU CTIO S. SW (Pin 1):. VOUT (Pin 5):. GND (Pin 2):. FB (Pin 3):. IN …
File Format / SizePDF / 223 Kb
Document LanguageEnglish

PI FU CTIO S. SW (Pin 1):. VOUT (Pin 5):. GND (Pin 2):. FB (Pin 3):. IN (Pin 6):. SHDN (Pin 4):. BLOCK DIAGRA

PI FU CTIO S SW (Pin 1): VOUT (Pin 5): GND (Pin 2): FB (Pin 3): IN (Pin 6): SHDN (Pin 4): BLOCK DIAGRA

Model Line for this Datasheet

Text Version of Document

LTC3400/LTC3400B
U U U PI FU CTIO S SW (Pin 1):
Switch Pin. Connect inductor between SW SHDN = Low: Shutdown, quiescent current < 1µA. and VIN. Optional Schottky diode is connected between 100Ω connected between SW and VIN. SW and VOUT. Keep these PCB trace lengths as short and Typically, SHDN should be connected to V wide as possible to reduce EMI and voltage overshoot. If IN through a 1M pull-up resistor. the inductor current falls to zero, or SHDN is low, an internal 100Ω antiringing switch is connected from SW to
VOUT (Pin 5):
Output Voltage Sense Input and Drain of the V Internal Synchronous Rectifier MOSFET. Bias is derived IN to minimize EMI. from V
GND (Pin 2):
Signal and Power Ground. Provide a short OUT. PCB trace length from VOUT to the output filter capacitor(s) should be as short and wide as possible. V direct PCB path between GND and the (–) side of the output OUT is held at V capacitor(s). IN – 0.6V in shutdown due to the body diode of the internal PMOS.
FB (Pin 3):
Feedback Input to the gm Error Amplifier.
V
Connect resistor divider tap to this pin. The output voltage
IN (Pin 6):
Battery Input Voltage. The device gets its start-up bias from V can be adjusted from 2.5V to 5V by: IN. Once VOUT exceeds VIN, bias comes from VOUT. Thus, once started, operation is com- VOUT = 1.23V • [1 + (R1/R2)] pletely independent from VIN. Operation is only limited by the output power level and the battery’s internal series
SHDN (Pin 4):
Logic Controlled

Shutdown Input. resistance. SHDN = High: Normal free running operation, 1.2MHz typical operating frequency.
W BLOCK DIAGRA
L1 4.7µH SINGLE + C 6 V IN CELL IN 1 SW 1µF OPTIONAL + INPUT SCHOTTKY VOUT GOOD – 2.3V START-UP A A/B OSC 3.3V MUX VOUT 0.45Ω OUTPUT B 5 SYNC PWM DRIVE CONTROL CONTROL 0.35Ω R1 RAMP C 1.02M FF CURRENT GEN (OPTIONAL) 1% SLOPE Σ SENSE 1.2MHz (EXTERNAL) COMP PWM COMPARATOR + FB – – C 3 OUT g – 4.7µF m ERROR AMP + 1.23V RC REF 80k CP2 R2 Burst Mode 2.5pF 604k SLEEP OPERATION CC 1% CONTROL 150pF (EXTERNAL) SHDN SHUTDOWN 2 GND 4 SHUTDOWN CONTROL 3400 BD 3400fa 4
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