Datasheet LTC3527, LTC3527-1 (Analog Devices) - 9
| Manufacturer | Analog Devices |
| Description | Dual 800mA/400mA, 1.2MHz/2.2MHz Synchronous Step-Up DC/DC Converters |
| Pages / Page | 22 / 9 — BLOCK DIAGRAM |
| File Format / Size | PDF / 373 Kb |
| Document Language | English |
BLOCK DIAGRAM
Model Line for this Datasheet
Text Version of Document
LTC3527/LTC3527-1
BLOCK DIAGRAM
SW1 BULK CONTROL SIGNALS 6 ANTI-RING VIN VOUT L1 VOUT1 V 4.7μH OUT1 5 V 1.6V TO 5.25V IN VIN1 0.88V 4 PWM OSC1 0.40Ω TO 5V LOGIC START1 CIN AND SD1 0.30Ω 4.7μF V DRIVERS REF_GD SHDN1 + – 1 CURRENT SHUTDOWN SENSE I SD1 ZERO AND VBIAS COMP MODE MODE PWM CONTROL WAKE1 R1 COMP FB1 – + + C V OUT1 C1 – 2 4.7μF + + 1.20V R2 ERROR ILIM + AMPLIFIER REF SLOPE COMPENSATION BURST 1 SLP1 SOFT-START PGOOD1 16 SD1 V – C CLAMP FB1 TSD + 1.20V - 9% CONVERTER 1 15 V V IN REFERENCE REF_GD FSEL OSC1 1.20V 10 UVLO GND SLP1 1.20V - 9% OSCILLATOR 14 OSC2 3 MODE THERMAL SD TSD EXPOSED SLP2 PAD/ 17 START-UP V START1 REF_GD PGND OSCILLATOR START2 SHARED BULK CONTROL SIGNALS SW2 7 ANTI-RING VIN VOUT L2 VOUT2 4.7μH V 8 OUT2 1.6V TO 5.25V VIN2 9 PWM OSC2 0.60Ω LOGIC START2 AND SD2 DRIVERS 0.50Ω VREF_GD SHDN2 + – 12 CURRENT SHUTDOWN SENSE I SD2 ZERO AND VBIAS COMP MODE MODE PWM CONTROL WAKE2 R3 COMP FB2 – + + C V OUT2 C2 – 11 4.7μF + + 1.20V R4 ERROR ILIM + AMPLIFIER REF SLOPE COMPENSATION BURST2 SLP2 SOFT-START PGOOD2 13 SD2 V – C CLAMP FB2 TSD + 1.20V - 9% CONVERTER 2 35271fc 9
BLOCK DIAGRAM
SW1 BULK CONTROL SIGNALS 6 ANTI-RING VIN VOUT L1 VOUT1 V 4.7μH OUT1 5 V 1.6V TO 5.25V IN VIN1 0.88V 4 PWM OSC1 0.40Ω TO 5V LOGIC START1 CIN AND SD1 0.30Ω 4.7μF V DRIVERS REF_GD SHDN1 + – 1 CURRENT SHUTDOWN SENSE I SD1 ZERO AND VBIAS COMP MODE MODE PWM CONTROL WAKE1 R1 COMP FB1 – + + C V OUT1 C1 – 2 4.7μF + + 1.20V R2 ERROR ILIM + AMPLIFIER REF SLOPE COMPENSATION BURST 1 SLP1 SOFT-START PGOOD1 16 SD1 V – C CLAMP FB1 TSD + 1.20V - 9% CONVERTER 1 15 V V IN REFERENCE REF_GD FSEL OSC1 1.20V 10 UVLO GND SLP1 1.20V - 9% OSCILLATOR 14 OSC2 3 MODE THERMAL SD TSD EXPOSED SLP2 PAD/ 17 START-UP V START1 REF_GD PGND OSCILLATOR START2 SHARED BULK CONTROL SIGNALS SW2 7 ANTI-RING VIN VOUT L2 VOUT2 4.7μH V 8 OUT2 1.6V TO 5.25V VIN2 9 PWM OSC2 0.60Ω LOGIC START2 AND SD2 DRIVERS 0.50Ω VREF_GD SHDN2 + – 12 CURRENT SHUTDOWN SENSE I SD2 ZERO AND VBIAS COMP MODE MODE PWM CONTROL WAKE2 R3 COMP FB2 – + + C V OUT2 C2 – 11 4.7μF + + 1.20V R4 ERROR ILIM + AMPLIFIER REF SLOPE COMPENSATION BURST2 SLP2 SOFT-START PGOOD2 13 SD2 V – C CLAMP FB2 TSD + 1.20V - 9% CONVERTER 2 35271fc 9
