link to page 16 16-Bit, 2 MSPS/1 MSPS, Precision,Pseudo Differential, SAR ADCsData SheetAD4000/AD4004FEATURESGENERAL DESCRIPTIONThroughput: 2 MSPS/1 MSPS options The AD4000/AD4004 are low noise, low power, high speed, 16-bit, INL: ±1.0 LSB maximum precision successive approximation register (SAR) analog-to-digital Guaranteed 16-bit, no missing codes converters (ADCs). The AD4000 offers a 2 MSPS throughput, and Low power the AD4004 offers a 1 MSPS throughput. They incorporate ease of 9.75 mW at 2 MSPS, 4.9 mW at 1 MSPS (VDD only) use features that lower the signal chain power, reduce signal chain 70 µW at 10 kSPS, 14 mW at 2 MSPS (total) complexity, and enable higher channel density. The high-Z mode, SNR: 93 dB typical at 1 kHz, VREF = 5 V; 90 dB typical at 100 kHz coupled with a long acquisition phase, eliminates the need for a THD: −115 dB typical at 1 kHz, VREF = 5 V; −95 dB typical at 100 kHz dedicated high power, high speed ADC driver, thus broadening the Ease of use features reduce system power and complexity range of low power precision amplifiers that can drive these ADCs Input overvoltage clamp circuit directly while still achieving optimum performance. The input Reduced nonlinear input charge kickback span compression feature enables the ADC driver amplifier and the High-Z mode ADC to operate off common supply rails without the need for a Long acquisition phase negative supply while preserving the full ADC code range. The Input span compression low serial peripheral interface (SPI) clock rate requirement reduces Fast conversion time allows low SPI clock rates the digital input/output power consumption, broadens processor SPI-programmable modes, read/write capability, status word options, and simplifies the task of sending data across digital Pseudo differential (single-ended) analog input range isolation. 0 V to VREF with VREF from 2.4 V to 5.1 VSingle 1.8 V supply operation with 1.71 V to 5.5 V logic interface Operating from a 1.8 V supply, the AD4000/AD4004 sample an SAR architecture: no latency/pipeline delay, valid first conversion analog input (IN+) from 0 V to VREF with respect to a ground sense First accurate conversion (IN−) with VREF ranging from 2.4 V to 5.1 V. The AD4000 Guaranteed operation: −40°C to 125°C consumes only 14 mW at 2 MSPS with a minimum of 70 MHz SPI-/QSPI-/MICROWIRE-/DSP-compatible serial interface SCK rate in turbo mode. The AD4004 consumes only 7 mW at Ability to daisy-chain multiple ADCs and busy indicator 1 MSPS with a minimum of 25 MHz SCK rate in turbo mode. Both 10-lead packages: 3 mm × 3 mm LFCSP, 3 mm × 4.90 mm MSOP the AD4000/AD4004 achieve ±1.0 LSB integral nonlinearity error (INL) maximum, no missing codes at 16 bits, and 93 dB signal-to- APPLICATIONS noise ratio (SNR). The reference voltage is applied externally and Automatic test equipment can be set independently of the supply voltage. Machine automation Medical equipment The SPI-compatible versatile serial interface features seven Battery-powered equipment different modes including the ability, using the SDI input, to Precision data acquisition systems daisy-chain several ADCs on a single 3-wire bus, and provides an