Datasheet AD7910, AD7920 (Analog Devices) - 22

ManufacturerAnalog Devices
Description250 kSPS, 12- Bit ADC in 6 Lead SC70
Pages / Page24 / 22 — AD7910/AD7920. APPLICATION HINTS GROUNDING AND LAYOUT. EVALUATING …
RevisionC
File Format / SizePDF / 498 Kb
Document LanguageEnglish

AD7910/AD7920. APPLICATION HINTS GROUNDING AND LAYOUT. EVALUATING PERFORMANCE

AD7910/AD7920 APPLICATION HINTS GROUNDING AND LAYOUT EVALUATING PERFORMANCE

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AD7910/AD7920 APPLICATION HINTS GROUNDING AND LAYOUT
The printed circuit board that houses the AD7910/AD7920 should be designed such that the analog and digital sections are separated and confined to certain areas of the board. This facilitates the use of ground planes that can be easily separated. A minimum etch technique is generally best for ground planes as it gives the best shielding. Digital and analog ground planes should be joined at only one place. If the AD7910/AD7920 is in a system where multiple devices require an AGND to DGND connection then the connection should still be made at one point only, a star ground point that should be established as 02976-028 close to the AD7910/AD7920 as possible. Figure 28. Recommended Supply Decoupling Scheme for the AD7910/AD7920 MSOP Package Avoid running digital lines under the device as these couple Similarly, for the SC70 package, the decoupling capacitor should noise onto the die. The analog ground plane should be allowed be located as close as possible to the VDD and GND pins. to run under the AD7910/AD7920 to avoid noise coupling. The Because of its pinout, that is, VDD being next to GND, the power supply lines to the AD7910/AD7920 should use as large a decoupling capacitor can be placed extremely close to the IC. trace as possible to provide low impedance paths and reduce the The decoupling capacitor could be placed on the underside of effects of glitches on the power supply line. Fast switching the PCB directly under the VDD and GND pins, but, as before, signals like clocks should be shielded with digital ground to the best performance is seen with the decoupling capacitor on avoid radiating noise to other sections of the board, and clock the same side as the IC. signals should never be run near the analog inputs. Avoid crossover of digital and analog signals. Traces on opposite sides of the board should run at right angles to each other. This reduces the effects of feedthrough through the board. A micro- strip technique is by far the best but is not always possible with a double-sided board. In this technique, the component side of the board is dedicated to ground planes while signals are placed on the solder side. Good decoupling is also very important. The supply should be decoupled with, for example, a 680 nF 0805 to GND. When using the SC70 package in applications where the size of the components is of concern, a 220 nF 0603 capacitor, for example, 02976-029 Figure 29. Recommended Supply Decoupling Scheme for the could be used instead. However, in that case, the decoupling can AD7910/AD7920 SC70 Package not be as effective and can result in an approximate SINAD degradation of 0.3 dB. To achieve the best performance from
EVALUATING PERFORMANCE
these decoupling components, the user should endeavor to keep The evaluation board package includes a fully assembled and the distance between the decoupling capacitor and the VDD and tested evaluation board, documentation, and software for GND pins to a minimum with short track lengths connecting controlling the board from the PC via the Eval-Board the respective pins. Figure 28 and Figure 29 show the Controller. To demonstrate/evaluate the ac and dc performance recommended positions of the decoupling capacitor for the of the AD7910/AD7920, the evaluation board controller can be MSOP and SC70 packages, respectively. used in conjunction with the AD7910/AD7920CB evaluation As can be seen in Figure 28, for the MSOP package, the boards as well as many other Analog Devices’ evaluation boards decoupling capacitor is placed as close as possible to the IC, ending in the CB designator. with short track lengths to VDD and GND pins. The decoupling The software allows the user to perform ac (fast Fourier capacitor could also be placed on the underside of the PCB transform) and dc (histogram of codes) tests on the directly underneath the IC, between the VDD and GND pins AD7910/AD7920. See the evaluation board technical note for attached by vias. This method would not be recommended on more information. PCBs above a standard 1.6 mm thickness. The best performance is seen with the decoupling capacitor on the top of the PCB next to the IC. Rev. C | Page 22 of 24 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS SPECIFICATIONS AD7910 AD7920 TIMING SPECIFICATIONS TIMING EXAMPLES TIMING EXAMPLE 1 TIMING EXAMPLE 2 ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY CIRCUIT INFORMATION CONVERTER OPERATION ADC TRANSFER FUNCTION TYPICAL CONNECTION DIAGRAM ANALOG INPUT DIGITAL INPUTS MODES OF OPERATION NORMAL MODE POWER-DOWN MODE POWER-UP TIME POWER VS. THROUGHPUT RATE SERIAL INTERFACE MICROPROCESSOR INTERFACING AD7910/AD7920 TO TMS320C541 INTERFACE AD7910/AD7920 TO ADSP-218x AD7910/AD7920 TO DSP563xx INTERFACE APPLICATION HINTS GROUNDING AND LAYOUT EVALUATING PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE