Datasheet AD7734 (Analog Devices) - 4
| Manufacturer | Analog Devices |
| Description | 4-Channel, ±10 V Input Range, High Throughput, 24-Bit Sigma-Delta A/D Converter |
| Pages / Page | 33 / 4 — Data Sheet. AD7734. SPECIFICATIONS. Table 1. Parameter. Min. Typ. Max. … |
| Revision | B |
| File Format / Size | PDF / 711 Kb |
| Document Language | English |
Data Sheet. AD7734. SPECIFICATIONS. Table 1. Parameter. Min. Typ. Max. Unit. Test Conditions/Comments
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Data Sheet AD7734 SPECIFICATIONS
−40°C to +105°C; AVDD = 5 V ± 5%; DVDD = 2.7 V to 3.6 V, or 5 V ± 5%; BIAS0 to BIAS3, BIASHI, REFIN(+) = 2.5 V; BIASLO, REFIN(−) = AGND; AIN Range = ±10 V; fMCLKIN = 6.144 MHz; unless otherwise noted.
Table 1. Parameter Min Typ Max Unit Test Conditions/Comments
ADC PERFORMANCE CHOPPING ENABLED Conversion Time Rate 372 12190 Hz Configure via Conv. Time Register No Missing Codes1, 2 24 Bits FW ≥ 6 (Conversion Time ≥ 165 µs) Output Noise See Table 4 Resolution See Table 5 and Table 6 Integral Nonlinearity (INL)1, 2 ±0.0010 ±0.0030 % of FSR fMCLKIN = 2.5 MHz Integral Nonlinearity (INL)2 ±0.0025 ±0.0060 % of FSR fMCLKIN = 6.144 MHz Offset Error (Unipolar, Bipolar)3 ±13 mV Before Calibration Offset Drift vs. Temperature1 ±2.5 µV/°C Gain Error3 ±0.45 % Before Calibration Gain Drift vs. Temperature1 ±3.2 ppm of FS/°C Positive Full-Scale Error3 ±0.5 % of FSR Before Calibration Positive Full-Scale Drift vs. Temp.1 ±3 ppm of FS/°C Bipolar Negative Full-Scale Error4 ±0.0050 % of FSR After Calibration Power Supply Sensitivity ±4 ±10 LSB16 At DC, AIN = 7 V, AVDD = 5 V ± 5% Channel-to-Channel Isolation 110 dB At DC, Maximum ±16.5 V AIN Voltage ADC PERFORMANCE CHOPPING DISABLED Conversion Time Rate 737 15437 Hz Configure via Conv. Time Register No Missing Codes1, 2 24 Bits FW ≥ 8 (Conversion Time ≥ 117 µs) Output Noise See Table 7 Resolution See Table 8 and Table 9 Integral Nonlinearity (INL)2 ±0.0025 % of FSR Offset Error (Unipolar, Bipolar)5 ±15 mV Before Calibration Offset Drift vs. Temperature ±25 µV/°C Gain Error3 ±0.1 % Before Calibration Gain Drift vs. Temperature ±5.3 ppm of FS/°C Positive Full-Scale Error3 ±0.2 % of FSR Before Calibration Positive Full-Scale Drift vs. Temp. ±4 ppm of FS/°C Bipolar Negative Full-Scale Error4 ±0.0050 % of FSR After Calibration Power Supply Sensitivity ±4 LSB16 At DC, AIN = 7 V, AVDD = 5 V ± 5% Channel-to-Channel Isolation 110 dB At DC, Maximum ±16.5 V AIN Voltage ANALOG INPUTS Analog Input Voltage1, 6, 7 ±10 V Range ±10 V 0 V to +10 V Range 0 to +10 V ±5 V Range ±5 V 0 V to +5 V Range 0 to +5 V BIASLO Voltage 0 V BIAS0 to 3, BIASHI Voltage 2.5 V AIN Impedance1, 8 100 124 kΩ AIN Pin, BIASLO Pin Impedance1, 8 87.5 108.5 kΩ Rev. B | Page 3 of 32 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS Timing Diagrams ABSOLUTE MAXIMUM RATINGS ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS OUTPUT NOISE AND RESOLUTION SPECIFICATION CHOPPING ENABLED CHOPPING DISABLED PIN CONFIGURATION AND FUNCTION DESCRIPTIONS REGISTER DESCRIPTION REGISTER ACCESS COMMUNICATIONS REGISTER I/O PORT REGISTER REVISION REGISTER TEST REGISTER ADC STATUS REGISTER CHECKSUM REGISTER ADC ZERO-SCALE CALIBRATION REGISTER ADC FULL-SCALE REGISTER CHANNEL DATA REGISTERS CHANNEL ZERO-SCALE CALIBRATION REGISTERS CHANNEL FULL-SCALE CALIBRATION REGISTERS CHANNEL STATUS REGISTERS CHANNEL SETUP REGISTERS CHANNEL CONVERSION TIME REGISTERS MODE REGISTER DIGITAL INTERFACE DESCRIPTION HARDWARE RESET ACCESS THE AD7734 REGISTERS SINGLE CONVERSION AND READING DATA DUMP MODE CONTINUOUS CONVERSION MODE CONTINUOUS READ (CONTINUOUS CONVERSION) MODE CIRCUIT DESCRIPTION ANALOG FRONT END ANALOG INPUT’S EXTENDED VOLTAGE RANGE CHOPPING MULTIPLEXER, CONVERSION, AND DATA OUTPUT TIMING Σ-Δ ADC FREQUENCY RESPONSE VOLTAGE REFERENCE INPUTS REFERENCE DETECT I/O PORT CALIBRATION ADC ZERO-SCALE SELF-CALIBRATION PER CHANNEL SYSTEM CALIBRATION OUTLINE DIMENSIONS ORDERING GUIDE
Data Sheet AD7734 SPECIFICATIONS
−40°C to +105°C; AVDD = 5 V ± 5%; DVDD = 2.7 V to 3.6 V, or 5 V ± 5%; BIAS0 to BIAS3, BIASHI, REFIN(+) = 2.5 V; BIASLO, REFIN(−) = AGND; AIN Range = ±10 V; fMCLKIN = 6.144 MHz; unless otherwise noted.
Table 1. Parameter Min Typ Max Unit Test Conditions/Comments
ADC PERFORMANCE CHOPPING ENABLED Conversion Time Rate 372 12190 Hz Configure via Conv. Time Register No Missing Codes1, 2 24 Bits FW ≥ 6 (Conversion Time ≥ 165 µs) Output Noise See Table 4 Resolution See Table 5 and Table 6 Integral Nonlinearity (INL)1, 2 ±0.0010 ±0.0030 % of FSR fMCLKIN = 2.5 MHz Integral Nonlinearity (INL)2 ±0.0025 ±0.0060 % of FSR fMCLKIN = 6.144 MHz Offset Error (Unipolar, Bipolar)3 ±13 mV Before Calibration Offset Drift vs. Temperature1 ±2.5 µV/°C Gain Error3 ±0.45 % Before Calibration Gain Drift vs. Temperature1 ±3.2 ppm of FS/°C Positive Full-Scale Error3 ±0.5 % of FSR Before Calibration Positive Full-Scale Drift vs. Temp.1 ±3 ppm of FS/°C Bipolar Negative Full-Scale Error4 ±0.0050 % of FSR After Calibration Power Supply Sensitivity ±4 ±10 LSB16 At DC, AIN = 7 V, AVDD = 5 V ± 5% Channel-to-Channel Isolation 110 dB At DC, Maximum ±16.5 V AIN Voltage ADC PERFORMANCE CHOPPING DISABLED Conversion Time Rate 737 15437 Hz Configure via Conv. Time Register No Missing Codes1, 2 24 Bits FW ≥ 8 (Conversion Time ≥ 117 µs) Output Noise See Table 7 Resolution See Table 8 and Table 9 Integral Nonlinearity (INL)2 ±0.0025 % of FSR Offset Error (Unipolar, Bipolar)5 ±15 mV Before Calibration Offset Drift vs. Temperature ±25 µV/°C Gain Error3 ±0.1 % Before Calibration Gain Drift vs. Temperature ±5.3 ppm of FS/°C Positive Full-Scale Error3 ±0.2 % of FSR Before Calibration Positive Full-Scale Drift vs. Temp. ±4 ppm of FS/°C Bipolar Negative Full-Scale Error4 ±0.0050 % of FSR After Calibration Power Supply Sensitivity ±4 LSB16 At DC, AIN = 7 V, AVDD = 5 V ± 5% Channel-to-Channel Isolation 110 dB At DC, Maximum ±16.5 V AIN Voltage ANALOG INPUTS Analog Input Voltage1, 6, 7 ±10 V Range ±10 V 0 V to +10 V Range 0 to +10 V ±5 V Range ±5 V 0 V to +5 V Range 0 to +5 V BIASLO Voltage 0 V BIAS0 to 3, BIASHI Voltage 2.5 V AIN Impedance1, 8 100 124 kΩ AIN Pin, BIASLO Pin Impedance1, 8 87.5 108.5 kΩ Rev. B | Page 3 of 32 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS Timing Diagrams ABSOLUTE MAXIMUM RATINGS ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS OUTPUT NOISE AND RESOLUTION SPECIFICATION CHOPPING ENABLED CHOPPING DISABLED PIN CONFIGURATION AND FUNCTION DESCRIPTIONS REGISTER DESCRIPTION REGISTER ACCESS COMMUNICATIONS REGISTER I/O PORT REGISTER REVISION REGISTER TEST REGISTER ADC STATUS REGISTER CHECKSUM REGISTER ADC ZERO-SCALE CALIBRATION REGISTER ADC FULL-SCALE REGISTER CHANNEL DATA REGISTERS CHANNEL ZERO-SCALE CALIBRATION REGISTERS CHANNEL FULL-SCALE CALIBRATION REGISTERS CHANNEL STATUS REGISTERS CHANNEL SETUP REGISTERS CHANNEL CONVERSION TIME REGISTERS MODE REGISTER DIGITAL INTERFACE DESCRIPTION HARDWARE RESET ACCESS THE AD7734 REGISTERS SINGLE CONVERSION AND READING DATA DUMP MODE CONTINUOUS CONVERSION MODE CONTINUOUS READ (CONTINUOUS CONVERSION) MODE CIRCUIT DESCRIPTION ANALOG FRONT END ANALOG INPUT’S EXTENDED VOLTAGE RANGE CHOPPING MULTIPLEXER, CONVERSION, AND DATA OUTPUT TIMING Σ-Δ ADC FREQUENCY RESPONSE VOLTAGE REFERENCE INPUTS REFERENCE DETECT I/O PORT CALIBRATION ADC ZERO-SCALE SELF-CALIBRATION PER CHANNEL SYSTEM CALIBRATION OUTLINE DIMENSIONS ORDERING GUIDE
