Datasheet AD7675 (Analog Devices) - 3

ManufacturerAnalog Devices
Description16-Bit, 100 kSPS Differential PulSAR A/D Converter
Pages / Page21 / 3 — AD7675–SPECIFICATIONS (–40. C to +85. C, AVDD = DVDD = 5 V, OVDD = 2.7 V …
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Document LanguageEnglish

AD7675–SPECIFICATIONS (–40. C to +85. C, AVDD = DVDD = 5 V, OVDD = 2.7 V to 5.25 V, unless otherwise noted.). Parameter

AD7675–SPECIFICATIONS (–40 C to +85 C, AVDD = DVDD = 5 V, OVDD = 2.7 V to 5.25 V, unless otherwise noted.) Parameter

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AD7675–SPECIFICATIONS (–40 C to +85 C, AVDD = DVDD = 5 V, OVDD = 2.7 V to 5.25 V, unless otherwise noted.) Parameter Conditions Min Typ Max Unit
RESOLUTION 16 Bits ANALOG INPUT Voltage Range VIN+ – VIN– –VREF +VREF V Operating Input Voltage VIN+, VIN– to AGND –0.1 +3 V Analog Input CMRR fIN = 10 kHz 79 dB Input Current 100 kSPS Throughput 1 µA Input Impedance See Analog Input Section THROUGHPUT SPEED Complete Cycle 10 µs Throughput Rate 0 100 kSPS DC ACCURACY Integral Linearity Error –1.5 +1.5 LSB1 No Missing Codes 16 Bits Transition Noise 0.35 LSB +Full-Scale Error2 –22 +22 LSB –Full-Scale Error2 –22 +22 LSB Zero Error2 –8 +8 LSB Power Supply Sensitivity AVDD = 5 V ± 5% ±0.5 LSB AC ACCURACY Signal-to-Noise fIN = 20 kHz 92 94 dB3 fIN = 45 kHz 94 dB3 Spurious Free Dynamic Range fIN = 20 kHz 104.5 110 dB3 fIN = 45 kHz 110 dB3 Total Harmonic Distortion fIN = 20 kHz –110 –103.5 dB3 fIN = 45 kHz –110 dB3 Signal-to-(Noise+Distortion) fIN = 20 kHz 92 94 dB3 fIN = 45 kHz 94 dB3 fIN = 45 kHz, –60 dB Input 34 dB3 –3 dB Input Bandwidth 3.9 MHz SAMPLING DYNAMICS Aperture Delay 2 ns Aperture Jitter 5 ps rms Transient Response Full-Scale Step 8.75 µs REFERENCE External Reference Voltage Range 2.3 2.5 AVDD – 1.85 V External Reference Current Drain 100 kSPS Throughput 35 µA DIGITAL INPUTS Logic Levels VIL –0.3 +0.8 V VIH 2.0 DVDD + 0.3 V IIL –1 +1 µA IIH –1 +1 µA DIGITAL OUTPUTS Data Format Parallel or Serial 16-Bit Conversion Results Available Pipeline Delay Immediately After Completed Conversion VOL ISINK = 1.6 mA 0.4 V VOH ISOURCE = –100 µA OVDD – 0.6 V POWER SUPPLIES Specified Performance AVDD 4.75 5 5.25 V DVDD 4.75 5 5.25 V OVDD 2.7 5.254 V Operating Current 300 kSPS Throughput AVDD 3 mA DVDD5 750 µA OVDD5 7.5 µA Power Dissipation5 100 kSPS Throughput 17 25 mW 100 SPS Throughput 15 µW In Power-Down Mode5 7 µW TEMPERATURE RANGE7 Specified Performance TMIN to TMAX –40 +85 °C NOTES 1LSB means Least Significant Bit. With the ±2.5 V input range, one LSB is 76.3 µV. 2See Definition of Specifications section. These specifications do not include the error contribution from the external reference. 3All specifications in dB are referred to a full-scale input FS. Tested with an input signal at 0.5 dB below full-scale unless otherwise specified. 4The max should be the minimum of 5.25 V and DVDD + 0.3 V. 5Tested in Parallel Reading Mode. 6With OVDD below DVDD + 0.3 V and all digital inputs forced to DVDD or DGND, respectively. 7Contact factory for extended temperature range. Specifications subject to change without notice. –2– REV. A Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM PulSAR Selection GENERAL DESCRIPTION PRODUCT HIGHLIGHTS SPECIFICATIONS Table I. Serial Clock Timings in Master Read after Convert ABSOLUTE MAXIMUM RATINGS ORDERING GUIDE PIN FUNCTION DESCRIPTIONS PIN CONFIGURATION DEFINITION OF SPECIFICATIONS INTEGRAL NONLINEARITY ERROR (INL) DIFFERENTIAL NONLINEARITY ERROR (DNL) +FULL-SCALE ERROR –FULL-SCALE ERROR BIPOLAR ZERO ERROR SPURIOUS FREE DYNAMIC RANGE (SFDR) EFFECTIVE NUMBER OF BITS (ENOB) TOTAL HARMONIC DISTORTION (THD) SIGNAL-TO-NOISE RATIO (SNR) SIGNAL-TO-(NOISE + DISTORTION) RATIO (S/[N+D]) APERTURE DELAY TRANSIENT RESPONSE Typical Performance Characteristics CIRCUIT INFORMATION CONVERTER OPERATION Transfer Functions TYPICAL CONNECTION DIAGRAM Analog Inputs Single to Differential Driver Driver Amplifier Choice Voltage Reference Input Power Supply POWER DISSIPATION CONVERSION CONTROL DIGITAL INTERFACE PARALLEL INTERFACE SERIAL INTERFACE MASTER SERIAL INTERFACE Internal Clock SLAVE SERIAL INTERFACE External Clock External Discontinuous Clock Data Read after Conversion External Clock Data Read During Conversion MICROPROCESSOR INTERFACING SPI Interface (MC68HC11) ADSP-21065L in Master Serial Interface APPLICATION HINTS Layout Evaluating the AD7675 Performance OUTLINE DIMENSIONS Revision History
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