Datasheet ADA4927-1/ADA4927-2 (Analog Devices) - 7

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Data Sheet ADA4927-1/ADA4927-2 ABSOLUTE MAXIMUM RATINGS Table 7.
The power dissipated in the package (PD) is the sum of the
Parameter Rating
quiescent power dissipation and the power dissipated in the package due to the load drive. The quiescent power is the voltage Supply Voltage 11 V between the supply pins (V Power Dissipation See Figure 4 S) times the quiescent current (IS). The power dissipated due to the load drive depends upon the Input Currents +IN, −IN, PD ±5 mA particular application. The power due to load drive is calculated Storage Temperature Range −65°C to +125°C by multiplying the load current by the associated voltage drop Operating Temperature Range −40°C to +105°C across the device. RMS voltages and currents must be used in Lead Temperature (Soldering, 10 sec) 300°C these calculations. Junction Temperature 150°C Airflow increases heat dissipation, effectively reducing θ Stresses at or above those listed under Absolute Maximum JA. In addition, more metal directly in contact with the package leads/ Ratings may cause permanent damage to the product. This is a exposed pad from metal traces, throughholes, ground, and power stress rating only; functional operation of the product at these planes reduces θ or any other conditions above those indicated in the operational JA. section of this specification is not implied. Operation beyond Figure 4 shows the maximum safe power dissipation in the the maximum operating conditions for extended periods may package vs. the ambient temperature for the single 16-lead LFCSP affect product reliability. (87°C/W) and the dual 24-lead LFCSP (47°C/W) on a JEDEC standard
THERMAL RESISTANCE
4-layer board with the exposed pad soldered to a PCB pad that θJA is specified for the device (including exposed pad) soldered is connected to a solid plane. to a high thermal conductivity 2s2p circuit board, as described
4.5
in EIA/JESD 51-7.
4.0 ) Table 8. (W 3.5 N Package Type θ IO JA Unit T 3.0
16-Lead LFCSP (Exposed Pad) 87 °C/W
PA ADA4927-2
24-Lead LFCSP (Exposed Pad) 47 °C/W
ISSI 2.5 D ER 2.0 W MAXIMUM POWER DISSIPATION ADA4927-1 1.5 M PO
The maximum safe power dissipation in the ADA4927 package
MU 1.0 XI
is limited by the associated rise in junction temperature (TJ) on
MA 0.5
the die. At approximately 150°C, which is the glass transition temperature, the plastic changes the properties. Even
0 –40 –20 0 20 40 60 80 100
003 temporarily exceeding this temperature limit can change the
AMBIENT TEMPERATURE (°C)
07574- stresses that the package exerts on the die, permanently shifting Figure 4. Maximum Power Dissipation vs. the parametric performance of the ADA4927. Exceeding a Ambient Temperature for a 4-Layer Board junction temperature of 150°C for an extended period can result
ESD CAUTION
in changes in the silicon devices, potentially causing failure. Rev. B | Page 7 of 25 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAMS REVISION HISTORY SPECIFICATIONS ±5 V OPERATION ±DIN to VOUT, dm Performance VOCM to VOUT, cm Performance General Performance +5 V OPERATION ±DIN to VOUT, dm Performance VOCM to VOUT, cm Performance General Performance ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS THEORY OF OPERATION DEFINITION OF TERMS Differential Voltage Common-Mode Voltage Balance APPLICATIONS INFORMATION ANALYZING AN APPLICATION CIRCUIT SETTING THE CLOSED-LOOP GAIN ESTIMATING THE OUTPUT NOISE VOLTAGE IMPACT OF MISMATCHES IN THE FEEDBACK NETWORKS CALCULATING THE INPUT IMPEDANCE FOR AN APPLICATION CIRCUIT Terminating a Single-Ended Input INPUT COMMON-MODE VOLTAGE RANGE INPUT AND OUTPUT CAPACITIVE AC COUPLING SETTING THE OUTPUT COMMON-MODE VOLTAGE POWER-DOWN Power-Down in Cold Applications LAYOUT, GROUNDING, AND BYPASSING HIGH PERFORMANCE ADC DRIVING OUTLINE DIMENSIONS ORDERING GUIDE