Datasheet AD8229 (Analog Devices) - 7
| Manufacturer | Analog Devices |
| Description | 1 nV/√Hz Low Noise 210°C Instrumentation Amplifier |
| Pages / Page | 25 / 7 — AD8229. Data Sheet. ABSOLUTE MAXIMUM RATINGS. PREDICTED LIFETIME VS. … |
| Revision | B |
| File Format / Size | PDF / 1.0 Mb |
| Document Language | English |
AD8229. Data Sheet. ABSOLUTE MAXIMUM RATINGS. PREDICTED LIFETIME VS. OPERATING. Table 2. TEMPERATURE. Parameter. Rating. 100k. 10k. our H
Text Version of Document
link to page 18 link to page 7 link to page 7
AD8229 Data Sheet ABSOLUTE MAXIMUM RATINGS PREDICTED LIFETIME VS. OPERATING Table 2. TEMPERATURE Parameter Rating
Supply Voltage ±17 V Comprehensive reliability testing is performed on the AD8229. Output Short-Circuit Current Duration Indefinite Product lifetimes at extended operating temperature are obtained Maximum Voltage at –IN, +IN1 ±V using high temperature operating life (HTOL). Lifetimes are S Differential Input Voltage1 predicted from the Arrhenius equation, taking into account Gain ≤ 4 ±V potential design and manufacturing failure mechanism assump- S 4 > Gain > 50 ±50 V/gain tions. HTOL is performed to JEDEC JESD22-A108. A minimum Gain ≥ 50 ±1 V of three wafer fab and assembly lots are processed through Maximum Voltage at REF ±V HTOL at the maximum operating temperature. Comprehensive S Storage Temperature Range −65°C to +150°C reliability testing is performed on all Analog Devices, Inc., high Specified Temperature Range temperature (HT) products. SBDIP −40°C to +210°C
100k
SOIC −40°C to +175°C Maximum Junction Temperature
) 10k s
SBDIP 245°C
our H
SOIC 200°C
( E 1k
ESD
TIM
Human Body Model 4 kV
LIFE D
Charge Device Model 1.5 kV
100 TE
Machine Model 200 V
IC D E R P
1 For voltages beyond these limits, use input protection resistors. See the
10
Theory of Operation section for more information. Stresses above those listed under Absolute Maximum Ratings
1 120 130 140 150 160 170 180 190 200 210
may cause permanent damage to the device. This is a stress 200
OPERATING TEMPERATURE (°C)
rating only; functional operation of the device at these or any 09412- Figure 3. Predicted Lifetime vs. Operating Temperature other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute Refer to the AD8229 Predicted Lifetime vs. Operating Temperature maximum rating conditions for extended periods may affect document for the most up-to-date reliability data. device reliability.
THERMAL RESISTANCE
θJA is specified for a device in free air using a 4-layer JEDEC printed circuit board (PCB).
Table 3. Package Type θJA Unit
8-Lead SBDIP 100 °C/W 8-Lead SOIC 121 °C/W
ESD CAUTION
Rev. B | Page 6 of 24 Document Outline Features Applications Functional Block Diagram General Description Revision History Specifications Absolute Maximum Ratings Predicted Lifetime vs. Operating Temperature Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Architecture Gain Selection RG Power Dissipation Reference Terminal Input Voltage Range Layout Common-Mode Rejection Ratio over Frequency Power Supplies Reference Pin Input Bias Current Return Path Input Protection Input Voltages Beyond the Rails Large Differential Input Voltage at High Gain IMAX Radio Frequency Interference (RFI) Calculating the Noise of the Input Stage Source Resistance Noise Voltage Noise of the Instrumentation Amplifier Current Noise of the Instrumentation Amplifier Total Noise Density Calculation Outline Dimensions Ordering Guide
AD8229 Data Sheet ABSOLUTE MAXIMUM RATINGS PREDICTED LIFETIME VS. OPERATING Table 2. TEMPERATURE Parameter Rating
Supply Voltage ±17 V Comprehensive reliability testing is performed on the AD8229. Output Short-Circuit Current Duration Indefinite Product lifetimes at extended operating temperature are obtained Maximum Voltage at –IN, +IN1 ±V using high temperature operating life (HTOL). Lifetimes are S Differential Input Voltage1 predicted from the Arrhenius equation, taking into account Gain ≤ 4 ±V potential design and manufacturing failure mechanism assump- S 4 > Gain > 50 ±50 V/gain tions. HTOL is performed to JEDEC JESD22-A108. A minimum Gain ≥ 50 ±1 V of three wafer fab and assembly lots are processed through Maximum Voltage at REF ±V HTOL at the maximum operating temperature. Comprehensive S Storage Temperature Range −65°C to +150°C reliability testing is performed on all Analog Devices, Inc., high Specified Temperature Range temperature (HT) products. SBDIP −40°C to +210°C
100k
SOIC −40°C to +175°C Maximum Junction Temperature
) 10k s
SBDIP 245°C
our H
SOIC 200°C
( E 1k
ESD
TIM
Human Body Model 4 kV
LIFE D
Charge Device Model 1.5 kV
100 TE
Machine Model 200 V
IC D E R P
1 For voltages beyond these limits, use input protection resistors. See the
10
Theory of Operation section for more information. Stresses above those listed under Absolute Maximum Ratings
1 120 130 140 150 160 170 180 190 200 210
may cause permanent damage to the device. This is a stress 200
OPERATING TEMPERATURE (°C)
rating only; functional operation of the device at these or any 09412- Figure 3. Predicted Lifetime vs. Operating Temperature other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute Refer to the AD8229 Predicted Lifetime vs. Operating Temperature maximum rating conditions for extended periods may affect document for the most up-to-date reliability data. device reliability.
THERMAL RESISTANCE
θJA is specified for a device in free air using a 4-layer JEDEC printed circuit board (PCB).
Table 3. Package Type θJA Unit
8-Lead SBDIP 100 °C/W 8-Lead SOIC 121 °C/W
ESD CAUTION
Rev. B | Page 6 of 24 Document Outline Features Applications Functional Block Diagram General Description Revision History Specifications Absolute Maximum Ratings Predicted Lifetime vs. Operating Temperature Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Architecture Gain Selection RG Power Dissipation Reference Terminal Input Voltage Range Layout Common-Mode Rejection Ratio over Frequency Power Supplies Reference Pin Input Bias Current Return Path Input Protection Input Voltages Beyond the Rails Large Differential Input Voltage at High Gain IMAX Radio Frequency Interference (RFI) Calculating the Noise of the Input Stage Source Resistance Noise Voltage Noise of the Instrumentation Amplifier Current Noise of the Instrumentation Amplifier Total Noise Density Calculation Outline Dimensions Ordering Guide
