Datasheet AD8224 (Analog Devices) - 4
| Manufacturer | Analog Devices |
| Description | Precision, Dual-Channel, JFET Input, Rail-to-Rail Instrumentation Amplifier |
| Pages / Page | 29 / 4 — Data Sheet. AD8224. SPECIFICATIONS |
| Revision | D |
| File Format / Size | PDF / 801 Kb |
| Document Language | English |
Data Sheet. AD8224. SPECIFICATIONS
Text Version of Document
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Data Sheet AD8224 SPECIFICATIONS
VS+ = +15 V, VS− = −15 V, VREF = 0 V, TA = 25°C, G = 1, RL = 2 kΩ1, unless otherwise noted. Table 2 displays the specifications for an individual instrumentation amplifier configured for a single-ended output or dual instrumentation amplifiers configured for differential outputs as shown in Figure 64.
Table 2. Individual Amplifier in Single-Ended Configuration or Dual Amplifiers in Differential Output Configuration2, V S = ±15 V Test Conditions/ A Grade B Grade Parameter Comments Min Typ Max Min Typ Max Unit
COMMON-MODE REJECTION RATIO (CMRR) CMRR DC to 60 Hz with V = ±10 V CM 1 kΩ Source Imbalance G = 1 78 86 dB G = 10 94 100 dB G = 100 94 100 dB G = 1000 94 100 dB CMRR at 10 kHz V = ±10 V CM G = 1 74 80 dB G = 10 84 90 dB G = 100 84 90 dB G = 1000 84 90 dB NOISE RTI noise = √(e 2 + (e /G)2) ni no Voltage Noise, 1 kHz Input Voltage Noise, e V +, V − = 0 V 14 14 17 nV/√Hz ni IN IN Output Voltage Noise, e V +, V − = 0 V 90 90 100 nV/√Hz no IN IN RTI, 0.1 Hz to 10 Hz G = 1 5 5 µV p-p G = 1000 0.8 0.8 µV p-p Current Noise f = 1 kHz 1 1 fA/√Hz VOLTAGE OFFSET RTI V = OS (V ) + (V /G) OSI OSO Input Offset, V 300 175 µV OSI Average TC T = −40°C to +85°C 10 5 µV/°C Output Offset, V 1200 800 µV OSO Average TC T = −40°C to +85°C 10 5 µV/°C Offset RTI vs. Supply (PSR) V = ±5 V to ±15 V S G = 1 86 86 dB G = 10 96 100 dB G = 100 96 100 dB G = 1000 96 100 dB INPUT CURRENT Input Bias Current 25 10 pA Over Temperature3 T = −40°C to +85°C 300 300 pA Input Offset Current 2 0.6 pA Over Temperature3 T = −40°C to +85°C 5 5 pA REFERENCE INPUT R 40 40 kΩ IN I V +, V − = 0 V 70 70 µA IN IN IN Voltage Range −V +V −V +V V S S S S Gain to Output 1 ± 1 ± V/V 0.0001 0.0001 Rev. D | Page 3 of 28 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Maximum Power Dissipation ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION GAIN SELECTION REFERENCE TERMINAL LAYOUT Package Considerations Hidden Paddle Package Exposed Pad Package Common-Mode Rejection over Frequency Reference Power Supplies SOLDER WASH INPUT BIAS CURRENT RETURN PATH INPUT PROTECTION RF INTERFERENCE COMMON-MODE INPUT VOLTAGE RANGE APPLICATIONS INFORMATION DRIVING AN ADC DIFFERENTIAL OUTPUT Setting the Common-Mode Voltage 2-Channel Differential Output Using a Dual Op Amp DRIVING A DIFFERENTIAL INPUT ADC First Antialiasing Filter Second Antialiasing Filter Reference DRIVING CABLING OUTLINE DIMENSIONS ORDERING GUIDE
Data Sheet AD8224 SPECIFICATIONS
VS+ = +15 V, VS− = −15 V, VREF = 0 V, TA = 25°C, G = 1, RL = 2 kΩ1, unless otherwise noted. Table 2 displays the specifications for an individual instrumentation amplifier configured for a single-ended output or dual instrumentation amplifiers configured for differential outputs as shown in Figure 64.
Table 2. Individual Amplifier in Single-Ended Configuration or Dual Amplifiers in Differential Output Configuration2, V S = ±15 V Test Conditions/ A Grade B Grade Parameter Comments Min Typ Max Min Typ Max Unit
COMMON-MODE REJECTION RATIO (CMRR) CMRR DC to 60 Hz with V = ±10 V CM 1 kΩ Source Imbalance G = 1 78 86 dB G = 10 94 100 dB G = 100 94 100 dB G = 1000 94 100 dB CMRR at 10 kHz V = ±10 V CM G = 1 74 80 dB G = 10 84 90 dB G = 100 84 90 dB G = 1000 84 90 dB NOISE RTI noise = √(e 2 + (e /G)2) ni no Voltage Noise, 1 kHz Input Voltage Noise, e V +, V − = 0 V 14 14 17 nV/√Hz ni IN IN Output Voltage Noise, e V +, V − = 0 V 90 90 100 nV/√Hz no IN IN RTI, 0.1 Hz to 10 Hz G = 1 5 5 µV p-p G = 1000 0.8 0.8 µV p-p Current Noise f = 1 kHz 1 1 fA/√Hz VOLTAGE OFFSET RTI V = OS (V ) + (V /G) OSI OSO Input Offset, V 300 175 µV OSI Average TC T = −40°C to +85°C 10 5 µV/°C Output Offset, V 1200 800 µV OSO Average TC T = −40°C to +85°C 10 5 µV/°C Offset RTI vs. Supply (PSR) V = ±5 V to ±15 V S G = 1 86 86 dB G = 10 96 100 dB G = 100 96 100 dB G = 1000 96 100 dB INPUT CURRENT Input Bias Current 25 10 pA Over Temperature3 T = −40°C to +85°C 300 300 pA Input Offset Current 2 0.6 pA Over Temperature3 T = −40°C to +85°C 5 5 pA REFERENCE INPUT R 40 40 kΩ IN I V +, V − = 0 V 70 70 µA IN IN IN Voltage Range −V +V −V +V V S S S S Gain to Output 1 ± 1 ± V/V 0.0001 0.0001 Rev. D | Page 3 of 28 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Maximum Power Dissipation ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION GAIN SELECTION REFERENCE TERMINAL LAYOUT Package Considerations Hidden Paddle Package Exposed Pad Package Common-Mode Rejection over Frequency Reference Power Supplies SOLDER WASH INPUT BIAS CURRENT RETURN PATH INPUT PROTECTION RF INTERFERENCE COMMON-MODE INPUT VOLTAGE RANGE APPLICATIONS INFORMATION DRIVING AN ADC DIFFERENTIAL OUTPUT Setting the Common-Mode Voltage 2-Channel Differential Output Using a Dual Op Amp DRIVING A DIFFERENTIAL INPUT ADC First Antialiasing Filter Second Antialiasing Filter Reference DRIVING CABLING OUTLINE DIMENSIONS ORDERING GUIDE
