Datasheet 2N6660 (Microchip)
| Manufacturer | Microchip |
| Description | 60V, 3 Ohm, N-Channel, Enhancement-Mode, Vertical DMOS FET |
| Pages / Page | 10 / 1 — 2N6660. N-Channel, Enhancement-Mode, Vertical DMOS FET. Features. … |
| File Format / Size | PDF / 463 Kb |
| Document Language | English |
2N6660. N-Channel, Enhancement-Mode, Vertical DMOS FET. Features. Description. Applications. Package Types. GATE. SOURCE. DRAIN. TO-39
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2N6660 N-Channel, Enhancement-Mode, Vertical DMOS FET Features Description
• Free from secondary breakdown 2N6660 is an enhancement-mode (normally-off) tran- • Low power drive requirement sistor that utilizes a vertical DMOS structure and a well- • Ease of paralleling proven silicon-gate manufacturing process. This com- • Low C bination produces a device with the power-handling ISS and fast switching speeds • Excellent thermal stability capabilities of bipolar transistors, and the high input impedance and positive temperature coefficient inher- • Integral source-drain diode ent in MOS devices. Characteristic of all MOS struc- • High input impedance and high gain tures, this device is free from thermal runaway and thermally-induced secondary breakdown.
Applications
Vertical DMOS FETs are ideally suited to a wide range • Motor controls of switching and amplifying applications where very- • Converters low threshold voltage, high breakdown voltage, high- • Amplifiers input impedance, low-input capacitance, and fast • Switches switching speeds are desired. • Power supply circuits • Drivers: relays, hammers, solenoids, lamps,
Package Types
memories, displays, bipolar transistors, etc.
GATE SOURCE DRAIN TO-39 Case: Drain
See Table 2-1 for pin information 2016 Microchip Technology Inc. DS20005509A-page 1 Document Outline 1.0 Electrical Characteristics 2.0 Pin Description TABLE 2-1: Pin Description 3.0 Functional Description FIGURE 3-1: Switching Waveforms and Test Circuit 4.0 Packaging Information 4.1 Package Marking Information AMERICAS Corporate Office Atlanta Austin, TX Boston Chicago Cleveland Dallas Detroit Houston, TX Indianapolis Los Angeles New York, NY San Jose, CA Canada - Toronto ASIA/PACIFIC Asia Pacific Office Hong Kong Australia - Sydney China - Beijing China - Chengdu China - Chongqing China - Dongguan China - Hangzhou China - Hong Kong SAR China - Nanjing China - Qingdao China - Shanghai China - Shenyang China - Shenzhen China - Wuhan China - Xian ASIA/PACIFIC China - Xiamen China - Zhuhai India - Bangalore India - New Delhi India - Pune Japan - Osaka Japan - Tokyo Korea - Daegu Korea - Seoul Malaysia - Kuala Lumpur Malaysia - Penang Philippines - Manila Singapore Taiwan - Hsin Chu Taiwan - Kaohsiung Taiwan - Taipei Thailand - Bangkok EUROPE Austria - Wels Denmark - Copenhagen France - Paris Germany - Dusseldorf Germany - Karlsruhe Germany - Munich Italy - Milan Italy - Venice Netherlands - Drunen Poland - Warsaw Spain - Madrid Sweden - Stockholm UK - Wokingham
2N6660 N-Channel, Enhancement-Mode, Vertical DMOS FET Features Description
• Free from secondary breakdown 2N6660 is an enhancement-mode (normally-off) tran- • Low power drive requirement sistor that utilizes a vertical DMOS structure and a well- • Ease of paralleling proven silicon-gate manufacturing process. This com- • Low C bination produces a device with the power-handling ISS and fast switching speeds • Excellent thermal stability capabilities of bipolar transistors, and the high input impedance and positive temperature coefficient inher- • Integral source-drain diode ent in MOS devices. Characteristic of all MOS struc- • High input impedance and high gain tures, this device is free from thermal runaway and thermally-induced secondary breakdown.
Applications
Vertical DMOS FETs are ideally suited to a wide range • Motor controls of switching and amplifying applications where very- • Converters low threshold voltage, high breakdown voltage, high- • Amplifiers input impedance, low-input capacitance, and fast • Switches switching speeds are desired. • Power supply circuits • Drivers: relays, hammers, solenoids, lamps,
Package Types
memories, displays, bipolar transistors, etc.
GATE SOURCE DRAIN TO-39 Case: Drain
See Table 2-1 for pin information 2016 Microchip Technology Inc. DS20005509A-page 1 Document Outline 1.0 Electrical Characteristics 2.0 Pin Description TABLE 2-1: Pin Description 3.0 Functional Description FIGURE 3-1: Switching Waveforms and Test Circuit 4.0 Packaging Information 4.1 Package Marking Information AMERICAS Corporate Office Atlanta Austin, TX Boston Chicago Cleveland Dallas Detroit Houston, TX Indianapolis Los Angeles New York, NY San Jose, CA Canada - Toronto ASIA/PACIFIC Asia Pacific Office Hong Kong Australia - Sydney China - Beijing China - Chengdu China - Chongqing China - Dongguan China - Hangzhou China - Hong Kong SAR China - Nanjing China - Qingdao China - Shanghai China - Shenyang China - Shenzhen China - Wuhan China - Xian ASIA/PACIFIC China - Xiamen China - Zhuhai India - Bangalore India - New Delhi India - Pune Japan - Osaka Japan - Tokyo Korea - Daegu Korea - Seoul Malaysia - Kuala Lumpur Malaysia - Penang Philippines - Manila Singapore Taiwan - Hsin Chu Taiwan - Kaohsiung Taiwan - Taipei Thailand - Bangkok EUROPE Austria - Wels Denmark - Copenhagen France - Paris Germany - Dusseldorf Germany - Karlsruhe Germany - Munich Italy - Milan Italy - Venice Netherlands - Drunen Poland - Warsaw Spain - Madrid Sweden - Stockholm UK - Wokingham
