Datasheet LTC4315 (Analog Devices) - 10
| Manufacturer | Analog Devices |
| Description | 2-Wire Bus Buffer with High Noise Margin |
| Pages / Page | 20 / 10 — APPLICATIONS INFORMATION. Figure 4. Level Shift Application Where the … |
| File Format / Size | PDF / 282 Kb |
| Document Language | English |
APPLICATIONS INFORMATION. Figure 4. Level Shift Application Where the LTC4315 VCC and
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LTC4315
APPLICATIONS INFORMATION
If VCC2 is tied low, output RTAs are disabled independent of 3.3V 2.5V the state of the ACC pin. Using a combination of the ACC pin and the V C1 R1 R2 R3 R4 R5 R6 C2 CC2 voltage, the input and output side RTAs can VCC VCC2 0.01μF 10k 10k 10k 10k 10k 10k 0.01μF be controlled independently. The RTAs are also internally DISCEN disabled during power up, VCC2 transitions described in ENABLE the Operation section and during a bus stuck low event. LTC4315 READY READY The RTAs when activated pull the bus up to SCL1 SCLIN SCLOUT SCL2 0.9 • V SDA1 SDAIN SDAOUT SDA2 CC and 0.9 • VCC2 on the input and output sides of ACC FAULT FAULT the SDA and SCL pins. Independent supply voltages VCC GND and V 4315 F04 CC2 maximize acceleration range on both inputs and outputs by allowing the RTA turn-off voltage to be set inde- pendently on the two sides. In order to prevent bus overdrive by the RTA, the bus supplies on the input and output sides
Figure 4. Level Shift Application Where the LTC4315 VCC and V
of the LTC4315 must be greater than or equal to 0.9 • V
CC2 Pins are Connected to the Bus Pull-Up Supply Voltages
CC and 0.9 • VCC2 respectively. An example is shown in Figure 3 where the input bus voltage is greater than VCC. During a
PULL-UP RESISTOR VALUE SELECTION
rising edge, the input bus rise rate will be accelerated by the RTA up to a voltage of 2.97V after which the bus rise To guarantee that the RTAs are activated during a rising rate will reduce to a value that is determined by the bus edge, the bus must rise on its own with a positive slew current and bus capacitance. The RTA turn-off voltage is rate of at least 0.4V/μs. To achieve this, choose a maximum less than the bus supply and the bus is not over driven. RBUS using the formula: This can also be accomplished by tying VCC to the input V ( ) bus supply and V DD,BUS(MIN) – VRTA(TH) CC2 to the output bus supply as shown RBUS ≤ (1) in Figure 4. In this case the input and output busses are V 0.4 • CBUS accelerated to 2.97V and 2.25V respectively µs 5V 3.3V RBUS is the bus pull-up resistor, VDD,BUS(MIN) is the minimum bus pull-up supply voltage, VRTA(TH) is the R1 R2 R3 R4 R5 R6 C1 VCC VCC2 10k 10k 10k 10k 10k 10k 0.01μF maximum voltage at which the RTA turns on and CBUS is DISCEN the equivalent bus capacitance. RBUS must also be large ENABLE enough to guarantee that: LTC4315 READY READY V SCL1 SCLIN SCLOUT SCL2 DD,BUS(MAX) – 0.4V ( ) SDA1 SDAIN SDAOUT SDA2 R ≥ (2) BUS ACC FAULT FAULT 4mA GND 4315 F03 This criterion ensures that the maximum bus current is less than 4mA.
Figure 3. Level Shift Application Where the SDAIN, SCLIN Bus Pull-Up Supply Voltages are Higher Than the Supply Voltages of the LTC4315
4315f 10 Document Outline FEATURES DESCRIPTION APPLICATIONS TYPICAL APPLICATION ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDER INFORMATION ELECTRICAL CHARACTERISTICS TYPICAL PERFORMANCE CHARACTERISTICS PIN FUNCTIONS BLOCK DIAGRAM OPERATION APPLICATIONS INFORMATION PACKAGE DESCRIPTION TYPICAL APPLICATION RELATED PARTS
APPLICATIONS INFORMATION
If VCC2 is tied low, output RTAs are disabled independent of 3.3V 2.5V the state of the ACC pin. Using a combination of the ACC pin and the V C1 R1 R2 R3 R4 R5 R6 C2 CC2 voltage, the input and output side RTAs can VCC VCC2 0.01μF 10k 10k 10k 10k 10k 10k 0.01μF be controlled independently. The RTAs are also internally DISCEN disabled during power up, VCC2 transitions described in ENABLE the Operation section and during a bus stuck low event. LTC4315 READY READY The RTAs when activated pull the bus up to SCL1 SCLIN SCLOUT SCL2 0.9 • V SDA1 SDAIN SDAOUT SDA2 CC and 0.9 • VCC2 on the input and output sides of ACC FAULT FAULT the SDA and SCL pins. Independent supply voltages VCC GND and V 4315 F04 CC2 maximize acceleration range on both inputs and outputs by allowing the RTA turn-off voltage to be set inde- pendently on the two sides. In order to prevent bus overdrive by the RTA, the bus supplies on the input and output sides
Figure 4. Level Shift Application Where the LTC4315 VCC and V
of the LTC4315 must be greater than or equal to 0.9 • V
CC2 Pins are Connected to the Bus Pull-Up Supply Voltages
CC and 0.9 • VCC2 respectively. An example is shown in Figure 3 where the input bus voltage is greater than VCC. During a
PULL-UP RESISTOR VALUE SELECTION
rising edge, the input bus rise rate will be accelerated by the RTA up to a voltage of 2.97V after which the bus rise To guarantee that the RTAs are activated during a rising rate will reduce to a value that is determined by the bus edge, the bus must rise on its own with a positive slew current and bus capacitance. The RTA turn-off voltage is rate of at least 0.4V/μs. To achieve this, choose a maximum less than the bus supply and the bus is not over driven. RBUS using the formula: This can also be accomplished by tying VCC to the input V ( ) bus supply and V DD,BUS(MIN) – VRTA(TH) CC2 to the output bus supply as shown RBUS ≤ (1) in Figure 4. In this case the input and output busses are V 0.4 • CBUS accelerated to 2.97V and 2.25V respectively µs 5V 3.3V RBUS is the bus pull-up resistor, VDD,BUS(MIN) is the minimum bus pull-up supply voltage, VRTA(TH) is the R1 R2 R3 R4 R5 R6 C1 VCC VCC2 10k 10k 10k 10k 10k 10k 0.01μF maximum voltage at which the RTA turns on and CBUS is DISCEN the equivalent bus capacitance. RBUS must also be large ENABLE enough to guarantee that: LTC4315 READY READY V SCL1 SCLIN SCLOUT SCL2 DD,BUS(MAX) – 0.4V ( ) SDA1 SDAIN SDAOUT SDA2 R ≥ (2) BUS ACC FAULT FAULT 4mA GND 4315 F03 This criterion ensures that the maximum bus current is less than 4mA.
Figure 3. Level Shift Application Where the SDAIN, SCLIN Bus Pull-Up Supply Voltages are Higher Than the Supply Voltages of the LTC4315
4315f 10 Document Outline FEATURES DESCRIPTION APPLICATIONS TYPICAL APPLICATION ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDER INFORMATION ELECTRICAL CHARACTERISTICS TYPICAL PERFORMANCE CHARACTERISTICS PIN FUNCTIONS BLOCK DIAGRAM OPERATION APPLICATIONS INFORMATION PACKAGE DESCRIPTION TYPICAL APPLICATION RELATED PARTS
