Datasheet ISL32704E (Intersil) - 3

ManufacturerIntersil
DescriptionUltra-Low EMI, Smallest Package Isolated RS-485 Transceiver
Pages / Page13 / 3 — 3.3V. ISOLATION. 100n. BARRIER. VDD1. VDD2X VDD2. VDD2. 5 DE. ISODE 15. …
Revision2017-03-29
File Format / SizePDF / 1.1 Mb
Document LanguageEnglish

3.3V. ISOLATION. 100n. BARRIER. VDD1. VDD2X VDD2. VDD2. 5 DE. ISODE 15. ISODE 10. XDE 12. 1.09k. A 9. A 12. 6 D. 127R. 2 R. 3 R. B 10. B 13. 4 RE. ISOR 13. GND1

3.3V ISOLATION 100n BARRIER VDD1 VDD2X VDD2 VDD2 5 DE ISODE 15 ISODE 10 XDE 12 1.09k A 9 A 12 6 D 127R 2 R 3 R B 10 B 13 4 RE ISOR 13 GND1

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ISL32704E Pin Descriptions PIN NUMBER 16 Ld 16 Ld PIN SOIC QSOP NAME FUNCTION 1 1 VDD1 Input power supply. 3 2 R Receiver output. R is high when A-B ≥ 200mV, and when A and B are floating. R is low when A-B ≤ -200mV. 2, 8 3 GND1 Input power supply ground return. Dual ground pins are connected internally. 4 4 RE Receiver output enable. R is enabled when RE is low. R is high impedance when RE is high. If the Rx enable function is not required, connect RE directly to GND1. 5 5 DE Driver output enable. The driver outputs, A and B, are enabled when DE is high. They are high impedance when DE is low. If the Tx enable function is not required, connect DE to VDD1 (Pin 1) through a 1kΩ or greater resistor. 6 6 D Driver input. A low on D forces output A low and output B high. A high on D forces output A high and output B low. 7, 11, 14 7, 8 NC No internal connection. 12 9 A ±15kV ESD protected, noninverting bus terminal. This pin is the noninverting receiver input when DE = 0 and the noninverting driver output when DE = 1. 13 10 B ±15kV ESD protected, inverting bus terminal. This pin is the inverting receiver input when DE = 0 and the inverting driver output when DE = 1. - 11 VDD2X Transceiver power supply. Connect to VDD2 (Pin 16). - 12 XDE External driver enable. Allows for enabling the driver from the bus side. Connect this pin to ISODE to control the driver from the controller side. This pin must not be left floating. - 13 ISOR Isolated receiver output for test purpose only. This pin is used for testing and should be left unconnected. 9, 15 14 GND2 Output power supply ground return. Dual ground pins are connected internally. 10 15 ISODE Isolated DE output. 16 16 VDD2 Isolator output power supply. Typical Operating Circuits
3.3V 5V ISOLATION 3.3V 5V 100n ISOLATION 100n BARRIER 100n 100n BARRIER 1 11 16 1 16 VDD1 VDD2X VDD2 VDD1 VDD2 5 DE ISODE 15 5 DE ISODE 10 XDE 12 1.09k 1.09k A 9 A 12 6 D 6 D 127R 127R 2 R 3 R B 10 B 13 4 RE ISOR 13 4 RE 1.09k 1.09k GND1 GND2 GND1 GND2 3 14 2,8 9,15 ISL32704EIAZ ISL32704EIBZ
FIGURE 2. TYPICAL OPERATING CIRCUITS FN8860 Rev.3.00 Page 3 of 13 Mar 29, 2017 Document Outline Related Literature Features Applications Ordering Information Pin Configurations Truth Table Truth Table Pin Descriptions Typical Operating Circuits Absolute Maximum Ratings (Note 16) Thermal Information Recommended Operating Conditions Electrical Specifications Insulation Specifications Magnetic Field Immunity (Note 16) Safety and Approvals VDE V 0884-11 (Certification Pending) UL 1577 Electromagnetic Compatibility Application Information RS-485 and Isolation Digital Isolator Principle GMR Resistor in Detail Low Emissions Low EMI Susceptibility Receiver (Rx) Features Driver (Tx) Features Built-In Driver Overload Protection Dynamic Power Consumption Power Supply Decoupling DC Correctness Data Rate, Cables, and Terminations Transient Protection Pinout Differences Between Packages Revision History About Intersil Package Outline Drawing M16.15B M16.3A
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