Datasheet AD7740 (Analog Devices) - 10

ManufacturerAnalog Devices
Description3 V/5 V Low Power, Synchronous Voltage-to-Frequency Converter
Pages / Page13 / 10 — AD7740. A/D Conversion Techniques Using the AD7740. FOUT. VIN. COUNTER. …
RevisionC
File Format / SizePDF / 330 Kb
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AD7740. A/D Conversion Techniques Using the AD7740. FOUT. VIN. COUNTER. CLKIN. GATE. FREQUENCY. SIGNAL. DIVIDER. CLOCK

AD7740 A/D Conversion Techniques Using the AD7740 FOUT VIN COUNTER CLKIN GATE FREQUENCY SIGNAL DIVIDER CLOCK

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AD7740 A/D Conversion Techniques Using the AD7740
Since TGATE × FOUTMAX = number of counts at full scale, the One method of using a VFC in an A/D system is to count the fastest conversion for a given resolution can be performed with output pulses of FOUT for a fixed gate interval (see Figure 9). the highest CLKIN frequency. This fixed gate interval should be generated by dividing down If the output frequency is measured by counting pulses gated to the clock input frequency. This ensures that any errors due to a signal derived from the clock, the clock stability is unimportant clock jitter or clock frequency drift are eliminated. The ratio of and the device simply performs as a voltage-controlled frequency the FOUT frequency to the clock frequency is what is important divider, producing a high-resolution ADC. The inherent mono- here, not the absolute value of FOUT. The frequency divi- tonicity of the transfer function and wide range of input clock sion can be done by a binary counter where CLKIN is the frequencies allows the conversion time and resolution to be counter input. optimized for specific applications. Another parameter is taken into account when choosing the
FOUT
length of the gate interval. Because the integration period of the
VIN TO P AD7740 COUNTER
VFC is equal to the gate interval, any interfering signal can be
CLKIN
rejected by counting for an integer number of periods of the
GATE FREQUENCY SIGNAL
interfering signal. For example, a gate interval of 100 ms will
DIVIDER
give normal-mode rejection of 50 Hz and 60 Hz signals.
CLOCK Isolation Applications GENERATOR
The AD7740 can also be used in isolated analog signal trans- Figure 9. A/D Conversion Using the AD7740 VFC mission applications. Due to noise, safety requirements or distance, it may be necessary to isolate the AD7740 from any controlling Figure 10 shows the waveforms of CLKIN, FOUT, and the circuitry. This can easily be achieved by using opto-isolators. Gate signal. A counter counts the rising edges of FOUT while the This is extremely useful in overcoming ground loops between Gate signal is high. Since the gate interval is not synchronized with equipment. FOUT, there is a possibility of a counting inaccuracy. Depending on FOUT, an error of one count may occur. The analog voltage to be transmitted is converted to a pulse train using the VFC. An opto-isolator circuit is used to couple this pulse train across an isolation barrier using light as the connecting medium. The input LED of the isolator is driven
CLKIN
from the output of the AD7740. At the receiver side, the output transistor is operated in the photo-transistor mode. The pulse train can be reconverted to an analog voltage using a frequency-
FOUT
to-voltage converter; alternatively, the pulse train can be fed into a counter to generate a digital signal. The analog and digital sections of the AD7740 have been designed
GATE tGATE
to allow operation from a single-ended power source, simplify- ing its use with isolated power supplies. Figure 10. Waveforms in an A/D Converter Using a VFC Figure 11 shows a general purpose VFC circuit using a low cost The clock frequency and the gate time determine the resolution opto-isolator. A 5 V power supply is assumed for both the iso- of such an ADC. If 12-bit resolution is required and CLKIN is lated (VDD) and local (VCC) supplies. 1 MHz (therefore, FOUTMAX is 0.9 MHz), the minimum gate
VCC
time required is calculated as follows:
VDD 0.1 F 10 F
N counts at Full Scale (0.9 MHz) will take
R
(N/0.9 × 106) seconds = minimum gate time N is the total number of codes for a given resolution; 4096 for 12 bits.
OPTOCOUPLER VIN AD7740
minimum gate time = (4096/0.9 × 106) seconds = 4.551 ms
FOUT GND1 ISOLATION BARRIER GND2
Figure 11. Opto-Isolated Application REV. C – 9 –
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