Datasheet ADIS16137 (Analog Devices) - 9
| Manufacturer | Analog Devices |
| Description | ±1000°/Sec Precision Angular Rate Sensor |
| Pages / Page | 21 / 9 — ADIS16137. Data Sheet. THEORY OF OPERATION. Table 7. Generic Master … |
| Revision | A |
| File Format / Size | PDF / 521 Kb |
| Document Language | English |
ADIS16137. Data Sheet. THEORY OF OPERATION. Table 7. Generic Master Processor SPI Settings. Processor Setting. Description
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ADIS16137 Data Sheet THEORY OF OPERATION
The ADIS16137 is an autonomous system that requires no user
Table 7. Generic Master Processor SPI Settings
initialization. As soon as it has a valid power supply, it initializes
Processor Setting Description
and starts sampling, processing, and loading sensor data into Master ADIS16137 operates as a slave the output registers. After each sample cycle concludes, DIO1 SCLK Rate ≤ 2.5 MHz Maximum serial clock rate pulses high. The SPI interface enables simple integration with SPI Mode 3 CPOL = 1 (polarity), CPHA = 1 (phase) many embedded processor platforms, as shown in Figure 10 MSB First Mode Bit sequence (electrical connection) and Table 6 (processor pin names and 16-Bit Mode Shift register/data length functions).
I/O LINES ARE COMPATIBLE WITH 5V READING SENSOR DATA 3.3V OR 5V LOGIC LEVELS VDD
A single register read requires two 16-bit SPI cycles. The first
10 11 12
cycle requests the contents of a register using the bit assignments
SYSTEM PROCESSOR SS 6 CS ADIS16137
shown in Figure 13. Then, the register contents follow on DOUT
SPI MASTER SCLK 3 SCLK
during the second sequence. Figure 11 includes three single register
MOSI 5 DIN
reads in succession. In this example, the process starts with Pin
MISO 4 DOUT
5, DIN = 0x0600, to request the contents of the GYRO_OUT
IRQ 7 DIO1
register and follows with 0x0400 to request the contents of the
13 14 15
GYRO_OUT2 register and then with 0x0200 to request the 010 54- contents of the TEMP_OUT register. Full duplex operation 18 1 enables processors to use the same 16-bit SPI cycle to read data Figure 10. Electrical Connection Diagram from DOUT while requesting the next set of data on the DIN
Table 6. Generic Master Processor Pin Names and Functions
pin. Figure 12 provides an example of the four SPI signals when
Pin Name Function
reading GYRO_OUT in a repeating pattern. SS Slave select
DIN 0x0600 0x0400 0x0200
SCLK Serial clock 1 01 4- MOSI Master output, slave input
DOUT GYRO_OUT GYRO_OUT2 TEMP_OUT
85 1 1 MISO Master input, slave output Figure 11. SPI Read Example IRQ Interrupt request
CS
The ADIS16137 SPI interface supports full duplex serial
SCLK
communication (simultaneous transmit and receive) and uses the bit sequence shown in Figure 13. Table 7 provides a list of
DIN DIN = 0000 0100 0000 0000 = 0x0400
the most common settings that require attention to initialize a
DOUT
012 processor serial port for the ADIS16137 SPI interface.
DOUT = 1111 1001 1101 1010 = 0xF9DA = –1574 LSBs = –63.959°/sec
1854- 1 Figure 12. SPI Read Example, Second 16-Bit Sequence
CS SCLK DIN R/W R/W A6 A5 A4 A3 A2 A1 A0 DC7 DC6 DC5 DC4 DC3 DC2 DC1 DC0 A6 A5 DOUT D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D15 D14 D13 NOTES 1. DOUT BITS ARE PRODUCED ONLY WHEN THE PREVIOUS 16-BIT DIN SEQUENCE STARTS WITH R/W = 0.
013
2. WHEN CS IS HIGH, DOUT IS IN A THREE-STATE, HIGH IMPEDANCE MODE, WHICH ALLOWS MULTIFUNCTIONAL USE OF THE LINE FOR OTHER DEVICES.
1854- 1 Figure 13. SPI Communication Bit Sequence Rev. A | Page 8 of 20 Document Outline Features Applications General Description Functional Block Diagram Table of Contents Revision History Specifications Timing Specifications Timing Diagrams Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Reading Sensor Data Output Data Registers Rotation Rate (Gyroscope) Internal Temperature Device Configuration Dual Memory Structure User Registers Digital Processing Configuration Internal Sample Rate Input Clock Configuration Digital Filtering Averaging/Decimation Filter Calibration Automatic Bias Correction (Autonull) Manual Bias Correction Restoring Factory Calibration Alarms Static Alarm Use Dynamic Alarm Use Alarm Reporting Alarm Example System Controls Global Commands Software Reset Memory Management Checksum Test General-Purpose Input/Output Data Ready Input/Output Indicator Example Input/Output Configuration Automatic Self Test Power Management Status Product Identification Applications Information Power Supply Considerations Prototype Interface Board Installation Tips Packaging and Ordering Information Outline Dimensions Ordering Guide
ADIS16137 Data Sheet THEORY OF OPERATION
The ADIS16137 is an autonomous system that requires no user
Table 7. Generic Master Processor SPI Settings
initialization. As soon as it has a valid power supply, it initializes
Processor Setting Description
and starts sampling, processing, and loading sensor data into Master ADIS16137 operates as a slave the output registers. After each sample cycle concludes, DIO1 SCLK Rate ≤ 2.5 MHz Maximum serial clock rate pulses high. The SPI interface enables simple integration with SPI Mode 3 CPOL = 1 (polarity), CPHA = 1 (phase) many embedded processor platforms, as shown in Figure 10 MSB First Mode Bit sequence (electrical connection) and Table 6 (processor pin names and 16-Bit Mode Shift register/data length functions).
I/O LINES ARE COMPATIBLE WITH 5V READING SENSOR DATA 3.3V OR 5V LOGIC LEVELS VDD
A single register read requires two 16-bit SPI cycles. The first
10 11 12
cycle requests the contents of a register using the bit assignments
SYSTEM PROCESSOR SS 6 CS ADIS16137
shown in Figure 13. Then, the register contents follow on DOUT
SPI MASTER SCLK 3 SCLK
during the second sequence. Figure 11 includes three single register
MOSI 5 DIN
reads in succession. In this example, the process starts with Pin
MISO 4 DOUT
5, DIN = 0x0600, to request the contents of the GYRO_OUT
IRQ 7 DIO1
register and follows with 0x0400 to request the contents of the
13 14 15
GYRO_OUT2 register and then with 0x0200 to request the 010 54- contents of the TEMP_OUT register. Full duplex operation 18 1 enables processors to use the same 16-bit SPI cycle to read data Figure 10. Electrical Connection Diagram from DOUT while requesting the next set of data on the DIN
Table 6. Generic Master Processor Pin Names and Functions
pin. Figure 12 provides an example of the four SPI signals when
Pin Name Function
reading GYRO_OUT in a repeating pattern. SS Slave select
DIN 0x0600 0x0400 0x0200
SCLK Serial clock 1 01 4- MOSI Master output, slave input
DOUT GYRO_OUT GYRO_OUT2 TEMP_OUT
85 1 1 MISO Master input, slave output Figure 11. SPI Read Example IRQ Interrupt request
CS
The ADIS16137 SPI interface supports full duplex serial
SCLK
communication (simultaneous transmit and receive) and uses the bit sequence shown in Figure 13. Table 7 provides a list of
DIN DIN = 0000 0100 0000 0000 = 0x0400
the most common settings that require attention to initialize a
DOUT
012 processor serial port for the ADIS16137 SPI interface.
DOUT = 1111 1001 1101 1010 = 0xF9DA = –1574 LSBs = –63.959°/sec
1854- 1 Figure 12. SPI Read Example, Second 16-Bit Sequence
CS SCLK DIN R/W R/W A6 A5 A4 A3 A2 A1 A0 DC7 DC6 DC5 DC4 DC3 DC2 DC1 DC0 A6 A5 DOUT D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D15 D14 D13 NOTES 1. DOUT BITS ARE PRODUCED ONLY WHEN THE PREVIOUS 16-BIT DIN SEQUENCE STARTS WITH R/W = 0.
013
2. WHEN CS IS HIGH, DOUT IS IN A THREE-STATE, HIGH IMPEDANCE MODE, WHICH ALLOWS MULTIFUNCTIONAL USE OF THE LINE FOR OTHER DEVICES.
1854- 1 Figure 13. SPI Communication Bit Sequence Rev. A | Page 8 of 20 Document Outline Features Applications General Description Functional Block Diagram Table of Contents Revision History Specifications Timing Specifications Timing Diagrams Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Reading Sensor Data Output Data Registers Rotation Rate (Gyroscope) Internal Temperature Device Configuration Dual Memory Structure User Registers Digital Processing Configuration Internal Sample Rate Input Clock Configuration Digital Filtering Averaging/Decimation Filter Calibration Automatic Bias Correction (Autonull) Manual Bias Correction Restoring Factory Calibration Alarms Static Alarm Use Dynamic Alarm Use Alarm Reporting Alarm Example System Controls Global Commands Software Reset Memory Management Checksum Test General-Purpose Input/Output Data Ready Input/Output Indicator Example Input/Output Configuration Automatic Self Test Power Management Status Product Identification Applications Information Power Supply Considerations Prototype Interface Board Installation Tips Packaging and Ordering Information Outline Dimensions Ordering Guide
