Datasheet ADXRS453 (Analog Devices)

ManufacturerAnalog Devices
DescriptionHigh Performance, Digital Output Gyroscope
Pages / Page33 / 1 — High Performance,. Digital Output Gyroscope. Data Sheet. ADXRS453. …
RevisionB
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Document LanguageEnglish

High Performance,. Digital Output Gyroscope. Data Sheet. ADXRS453. FEATURES. GENERAL DESCRIPTION

Datasheet ADXRS453 Analog Devices, Revision: B

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High Performance, Digital Output Gyroscope Data Sheet ADXRS453 FEATURES GENERAL DESCRIPTION Complete rate gyroscope on a single chip
The ADXRS453 is an angular rate sensor (gyroscope) intended
±300°/sec angular rate sensing
for industrial, instrumentation, and stabilization applications in
Ultrahigh vibration rejection: 0.01°/sec/g
high vibration environments. An advanced, differential, quad
Excellent 16°/hour null bias stability
sensor design rejects the influence of linear acceleration, enabling
Internal temperature compensation
the ADXRS453 to offer high accuracy rate sensing in harsh
2000 g powered shock survivability
environments where shock and vibration are present.
SPI digital output with 16-bit data-word
The ADXRS453 uses an internal, continuous self-test architec-
Low noise and low power
ture. The integrity of the electromechanical system is checked by
3.3 V to 5 V operation
applying a high frequency electrostatic force to the sense structure
−40°C to +105°C operation
to generate a rate signal that can be differentiated from the base-
Ultrasmall, light, and RoHS compliant
band rate data and internally analyzed.
Two package options Low cost SOIC_CAV package for yaw rate (z-axis) response
The ADXRS453 is capable of sensing an angular rate of up to
Innovative ceramic vertical mount package (LCC_V) for
±300°/sec. Angular rate data is presented as a 16-bit word that
pitch and roll response
is part of a 32-bit SPI message.
APPLICATIONS
The ADXRS453 is available in a 16-lead plastic cavity SOIC (SOIC_CAV) and an SMT-compatible vertical mount package
Rotation sensing in high vibration environments
(LCC_V), and is capable of operating across a wide voltage
Rotation sensing for industrial and instrumentation
range (3.3 V to 5 V).
applications High performance platform stabilization FUNCTIONAL BLOCK DIAGRAM CP5 VX HIGH VOLTAGE GENERATION PDD ADXRS453 LDO REGULATOR DVDD HV DRIVE AVDD CLOCK ARITHMETIC PHASE- DIVIDER LOGIC UNIT LOCKED LOOP DECIMATION AMPLITUDE Y FILTER R DETECT MO MOSI TEMPERATURE /ME BAND-PASS 12-BIT CALIBRATION S DEMOD SPI MISO FILTER ADC INTERFACE ER SCLK IST CS G FAULT E Q FILTER R Q DAQ DETECTION Z-AXIS ANGULAR RATE SENSOR DVSS P DAQ SELF-TEST CONTROL PSS AVSS EEPROM
01 0 5- 15 09 Figure 1.
Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 www.analog.com Trademarks and registered trademarks are the property of their respective owners. Fax: 781.461.3113 ©2011 Analog Devices, Inc. All rights reserved.
Document Outline Features Applications General Description Functional Block Diagram Revision History Specifications Absolute Maximum Ratings Thermal Resistance Rate Sensitive Axis ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Theory of Operation Continuous Self-Test Mechanical Performance Noise Performance Applications Information Calibrated Performance Mechanical Considerations for Mounting Application Circuits ADXRS453 Signal Chain Timing SPI Communication Protocol Command/Response Device Data Latching SPI Timing Characteristics Command/Response Bit Definitions SQ2 to SQ0 Bits SM2 to SM0 Bits A8 to A0 Bits D15 to D0 Bits P Bit SPI Bit RE Bit DU Bit ST1 and ST0 Bits P0 Bit P1 Bit Fault Register Bit Definitions Fail Bit AMP Bit OV Bit UV Bit PLL Bit Q Bit NVM Bit POR Bit PWR Bit CST Bit CHK Bit Recommended Start-Up Sequence with CHK Bit Assertion Rate Data Format Memory Map and Registers Memory Map Memory Register Definitions Rate (RATEx) Registers Temperature (TEMx) Registers Low CST (LOCSTx) Registers High CST (HICSTx) Registers Quad Memory (QUADx) Registers Fault (FAULTx) Registers Part ID (PIDx) Registers Serial Number (SNx) Registers Package Orientation and Layout Information Solder Profile Package Marking Codes Outline Dimensions Ordering Guide
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