Datasheet CA3140, CA3140A (Intersil) - 7

CA3140, CA3140A Output Circuit Considerations
level shifting circuitry usually associated with the 741 series Excellent interfacing with TTL circuitry is easily achieved with of operational amplifiers. a single 6.2V zener diode connected to Terminal 8 as shown Figure 4 shows some typical configurations. Note that a in Figure 1. This connection assures that the maximum series resistor, RL, is used in both cases to limit the drive output signal swing will not go more positive than the zener available to the driven device. Moreover, it is recommended voltage minus two base-to-emitter voltage drops within the that a series diode and shunt diode be used at the thyristor CA3140. These voltages are independent of the operating input to prevent large negative transient surges that can supply voltage. appear at the gate of thyristors, from damaging the integrated circuit.
V+ 5V TO 36V LOGIC Offset Voltage Nulling 7 SUPPLY 8 6.2V
The input offset voltage can be nulled by connecting a 10kΩ
2 5V
potentiometer between Terminals 1 and 5 and returning its
CA3140 6 TYPICAL
wiper arm to terminal 4, see Figure 3A. This technique, ≈
TTL GATE
however, gives more adjustment range than required and
3 5V 4
therefore, a considerable portion of the potentiometer rotation is not fully utilized. Typical values of series resistors (R) that may be placed at either end of the potentiometer, see Figure 3B, to optimize its utilization range are given in
FIGURE 1. ZENER CLAMPING DIODE CONNECTED TO
the Electrical Specifications table.
TERMINALS 8 AND 4 TO LIMIT CA3140 OUTPUT SWING TO TTL LEVELS
An alternate system is shown in Figure 3C. This circuit uses only one additional resistor of approximately the value
) 1000 16 SUPPLY VOLTAGE (V-) = 0V
shown in the table. For potentiometers, in which the
, Q TA = 25oC
resistance does not drop to 0Ω at either end of rotation, a
15Q ( (mV)
value of resistance 10% lower than the values shown in the
OR E 100 SUPPLY VOLTAGE (V+) = +5V G +15V
table should be used.
ST A T SI L +30V N O Low Voltage Operation A V N
Operation at total supply voltages as low as 4V is possible
TR E TIO G 10
with the CA3140. A current regulator based upon the PMOS
A
threshold voltage maintains reasonable constant operating
ST TURA T A U S
current and hence consistent performance down to these
TP
lower voltages.
U O 1 0.01 0.1 1.0 10
The low voltage limitation occurs when the upper extreme of the
LOAD (SINKING) CURRENT (mA)
input common mode voltage range extends down to the voltage
FIGURE 2. VOLTAGE ACROSS OUTPUT TRANSISTORS (Q
at Terminal 4. This limit is reached at a total supply voltage just
15 AND Q16) vs LOAD CURRENT
below 4V. The output voltage range also begins to extend down to the negative supply rail, but is slightly higher than that of the Figure 2 shows output current sinking capabilities of the input. Figure 8 shows these characteristics and shows that with CA3140 at various supply voltages. Output voltage swing to 2V dual supplies, the lower extreme of the input common mode the negative supply rail permits this device to operate both voltage range is below ground potential. power transistors and thyristors directly without the need for
V+ V+ V+ 2 7 2 7 2 7 CA3140 6 CA3140 6 CA3140 6 3 4 3 4 5 3 4 5 1 5 1 R R 1 10k
Ω
10k
Ω
10k
Ω
R V- V- V- FIGURE 3A. BASIC FIGURE 3B. IMPROVED RESOLUTION FIGURE 3C. SIMPLER IMPROVED RESOLUTION FIGURE 3. THREE OFFSET VOLTAGE NULLING METHODS
7 FN957.10 July 11, 2005