Datasheet LTM4601AHV (Analog Devices) - 10

LTM4601AHV
applicaTions inForMaTion
The typical LTM4601AHV application circuits are shown in The MPGM pin programs a current that when multiplied Figures 19 and 20. External component selection is primar- by an internal 10k resistor sets up the 0.6V reference ± ily determined by the maximum load current and output offset for margining. A 1.18V reference divided by the voltage. Refer to Table 2 for specific external capacitor RPGM resistor on the MPGM pin programs the current. requirements for a particular application. Calculate VOUT(MARGIN):
VIN to VOUT Step-Down Ratios
VOUT(MARGIN) = %VOUT • VOUT There are restrictions in the maximum V 100 IN and VOUT step down ratio that can be achieved for a given input voltage. where %V These constraints are shown in the Typical Performance OUT is the percentage of VOUT you want to margin, and V Characteristics curves labeled “V OUT(MARGIN) is the margin quantity in volts: IN to VOUT Step-Down Ratio”. Note that additional thermal derating may apply. See R • 1.18V • 10k the Thermal Considerations and Output Current Derating PGM = VOUT 0.6V VOUT(MARGIN) section of this data sheet. where R
Output Voltage Programming and Margining
PGM is the resistor value to place on the MPGM pin to ground. The PWM controller has an internal 0.6V reference voltage. The margining voltage, V As shown in the Block Diagram, a 1M and a 60.4k 0.5% OUT(MARGIN), will be added or subtracted from the nominal output voltage as determined internal feedback resistor connects VOUT and VFB pins by the state of the MARG0 and MARG1 pins. See the truth together. The VOUT_LCL pin is connected between the 1M table below: and the 60.4k resistor. The 1M resistor is used to protect against an output overvoltage condition if the VOUT_LCL
MARG1 MARG0 MODE
pin is not connected to the output, or if the remote sense LOW LOW NO MARGIN amplifier output is not connected to VOUT_LCL. In these LOW HIGH MARGIN UP cases, the output voltage will default to 0.6V. Adding a HIGH LOW MARGIN DOWN resistor RSET from the VFB pin to SGND pin programs HIGH HIGH NO MARGIN the output voltage:
Input Capacitors
60.4k +R V SET OUT = 0.6V LTM4601AHV module should be connected to a low AC RSET impedance DC source. Input capacitors are required to or equivalently: be placed adjacent to the module. In Figure 20, the 10µF ceramic input capacitors are selected for their ability to R handle the large RMS current into the converter. An input SET = 60.4k  VOUT  bulk capacitor of 100µF is optional. This 100µF capacitor  − 1 is only needed if the input source impedance is compro-  0.6V  mised by long inductive leads or traces.
Table 1. Standard 1% Resistor Values RSET (kΩ)
Open 60.4 40.2 30.1 25.5 19.1 13.3 8.25
VOUT (V)
0.6 1.2 1.5 1.8 2 2.5 3.3 5 4601ahvfc 10 For more information www.linear.com/LTM4601AHV Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Simplified Block Diagram Decoupling Requirements Operation Applications Information Typical Applications Package Description Revision History Package Photos Related Parts