Datasheet ADE7854, ADE7858, ADE7868, ADE7878 (Analog Devices) - 82

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ADE7854/ADE7858/ADE7868/ADE7878 Data Sheet Register Bit Bit Length During Default Address Name R/W1 Length Communication2 Type 3 Value Description
0x43B9 to Reserved N/A4 N/A4 N/A4 N/A4 0x000000 These memory locations should be kept 0x43BE at 0x000000 for proper operation. 0x43BF ISUM R 28 32 ZP S N/A4 Sum of IAWV, IBWV, and ICWV registers (ADE7868 and ADE7878 only). 0x43C0 AIRMS R 24 32 ZP S N/A4 Phase A current rms value. 0x43C1 AVRMS R 24 32 ZP S N/A4 Phase A voltage rms value. 0x43C2 BIRMS R 24 32 ZP S N/A4 Phase B current rms value. 0x43C3 BVRMS R 24 32 ZP S N/A4 Phase B voltage rms value. 0x43C4 CIRMS R 24 32 ZP S N/A4 Phase C current rms value. 0x43C5 CVRMS R 24 32 ZP S N/A4 Phase C voltage rms value. 0x43C6 NIRMS R 24 32 ZP S N/A4 Neutral current rms value (ADE7868 and ADE7878 only). 0x43C7 to Reserved N/A4 N/A4 N/A4 N/A4 N/A4 These memory locations should not be 0x43FF written for proper operation. 1 R is read, and W is write. 2 32 ZPSE = 24-bit signed register that is transmitted as a 32-bit word with four MSBs padded with 0s and sign extended to 28 bits. Whereas 32 ZP = 28- or 24-bit signed or unsigned register that is transmitted as a 32-bit word with four MSBs or eight MSBs, respectively, padded with 0s. 3 U is unsigned register, and S is signed register in twos complement format. 4 N/A means not applicable.
Table 31. Internal DSP Memory RAM Registers Bit Length Register Bit During Default Address Name R/W1 Length Communication Type2 Value Description
0xE203 Reserved R/W 16 16 U 0x0000 This memory location should not be written for proper operation. 0xE228 Run R/W 16 16 U 0x0000 Run register starts and stops the DSP. See the Digital Signal Processor section for more details. 1 R is read, and W is write. 2 U is unsigned register, and S is signed register in twos complement format.
Table 32. Billable Registers Bit Length Register Bit During Default Address Name R/W1, 2 Length2 Communication2 Type2, 3 Value Description
0xE400 AWATTHR R 32 32 S 0x00000000 Phase A total active energy accumulation. 0xE401 BWATTHR R 32 32 S 0x00000000 Phase B total active energy accumulation. 0xE402 CWATTHR R 32 32 S 0x00000000 Phase C total active energy accumulation. 0xE403 AFWATTHR R 32 32 S 0x00000000 Phase A fundamental active energy accumulation (ADE7878 only). 0xE404 BFWATTHR R 32 32 S 0x00000000 Phase B fundamental active energy accumulation (ADE7878 only). 0xE405 CFWATTHR R 32 32 S 0x00000000 Phase C fundamental active energy accumulation (ADE7878 only). 0xE406 AVARHR R 32 32 S 0x00000000 Phase A total reactive energy accumulation (ADE7858, ADE7868, and ADE7878 only). 0xE407 BVARHR R 32 32 S 0x00000000 Phase B total reactive energy accumulation (ADE7858, ADE7868, and ADE7878 only). 0xE408 CVARHR R 32 32 S 0x00000000 Phase C total reactive energy accumulation (ADE7858, ADE7868, and ADE7878 only). 0xE409 AFVARHR R 32 32 S 0x00000000 Phase A fundamental reactive energy accumulation (ADE7878 only). 0xE40A BFVARHR R 32 32 S 0x00000000 Phase B fundamental reactive energy accumulation (ADE7878 only). 0xE40B CFVARHR R 32 32 S 0x00000000 Phase C fundamental reactive energy accumulation (ADE7878 only). Rev. H | Page 82 of 100 Document Outline Features Applications General Description Table of Contents Revision History Functional Block Diagrams Specifications Timing Characteristics Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Test Circuit Terminology Power Management PSM0—Normal Power Mode (All Parts) PSM1—Reduced Power Mode (ADE7868, ADE7878 Only) PSM2—Low Power Mode (ADE7868, ADE7878 Only) PSM3—Sleep Mode (All Parts) Power-Up Procedure Hardcore Reset Software Reset Functionality Theory of Operation Analog Inputs Analog-to-Digital Conversion Antialiasing Filter ADC Transfer Function Current Channel ADC Current Waveform Gain Registers Current Channel HPF Current Channel Sampling di/dt Current Sensor and Digital Integrator Voltage Channel ADC Voltage Waveform Gain Registers Voltage Channel HPF Voltage Channel Sampling Changing Phase Voltage Datapath POWER QUALITY MEASUREMENTS Zero-Crossing Detection Zero-Crossing Timeout Phase Sequence Detection Time Interval Between Phases Period Measurement Phase Voltage Sag Detection SAG Level Set Peak Detection Overvoltage and Overcurrent Detection Overvoltage and Overcurrent Level Set Neutral Current Mismatch—ADE7868, ADE7878 Phase Compensation Reference Circuit Digital Signal Processor Root Mean Square Measurement Current RMS Calculation Current RMS Offset Compensation Current Mean Absolute Value Calculation—ADE7868 and ADE7878 Only Current MAV Gain and Offset Compensation Voltage Channel RMS Calculation Voltage RMS Offset Compensation Active Power Calculation Total Active Power Calculation Fundamental Active Power Calculation—ADE7878 Only Active Power Gain Calibration Active Power Offset Calibration Sign of Active Power Calculation Active Energy Calculation Integration Time Under Steady Load Energy Accumulation Modes Line Cycle Active Energy Accumulation Mode Reactive Power Calculation—ADE7858, ADE7868, ADE7878 Only Reactive Power Gain Calibration Reactive Power Offset Calibration Sign of Reactive Power Calculation Reactive Energy Calculation Integration Time Under A Steady Load Energy Accumulation Modes Line Cycle Reactive Energy Accumulation Mode Apparent Power Calculation Apparent Power Gain Calibration Apparent Power Offset Calibration Apparent Power Calculation Using VNOM Apparent Energy Calculation Integration Time Under Steady Load Energy Accumulation Mode Line Cycle Apparent Energy Accumulation Mode Waveform Sampling Mode Energy-to-Frequency Conversion Synchronizing Energy Registers with CFx Outputs CF Outputs for Various Accumulation Modes Sign of Sum-of-Phase Powers in the CFx Datapath No Load Condition No Load Detection Based On Total Active, Reactive Powers No Load Detection Based on Fundamental Active and Reactive Powers—ADE7878 Only No Load Detection Based on Apparent Power Checksum Register Interrupts Using the Interrupts with an MCU Serial Interfaces Serial Interface Choice I2C-Compatible Interface I2C Write Operation I2C Read Operation SPI-Compatible Interface SPI Read Operation SPI Write Operation HSDC Interface Quick Setup as Energy Meter Layout Guidelines Crystal Circuit ADE7878 Evaluation Board Die Version Silicon Anomaly ADE7854/ADE7858/ADE7868/ADE7878 Functionality Issues Functionality Issues SECTION 1. ADE7854/ADE7858/ADE7868/ADE7878 Functionality Issues Registers List Outline Dimensions Ordering Guide