Datasheet LT8641 (Analog Devices) - 10
| Manufacturer | Analog Devices |
| Description | 65V, 3.5A Synchronous Step-Down Silent Switcher with 2.5μA Quiescent Current |
| Pages / Page | 26 / 10 — PIN FUNCTIONS BIAS (Pin 1):. GND2 (10, 11):. INTVCC (Pin 2):. VIN2 (Pin … |
| Revision | B |
| File Format / Size | PDF / 3.4 Mb |
| Document Language | English |
PIN FUNCTIONS BIAS (Pin 1):. GND2 (10, 11):. INTVCC (Pin 2):. VIN2 (Pin 13):. BST (Pin 3):. EN/UV (Pin 14):. IN1 (Pin 4):
Model Line for this Datasheet
LT8641
Text Version of Document
LT8641
PIN FUNCTIONS BIAS (Pin 1):
The internal regulator will draw current
GND2 (10, 11):
Power Switch Ground. These pins are the from BIAS instead of VIN when BIAS is tied to a voltage return path of the internal bottom side power switch and higher than 3.1V. For output voltages of 3.3V to 25V this must be tied together. Place the negative terminal of the pin should be tied to VOUT. If this pin is tied to a supply input capacitor as close to the GND2 pins as possible. Also other than VOUT use a 1µF local bypass capacitor on this be sure to tie GND2 to the ground plane. See the Applica- pin. If no supply is available, tie to GND. tions Information section for sample layout.
INTVCC (Pin 2):
Internal 3.4V Regulator Bypass Pin. The
VIN2 (Pin 13):
The LT8641 requires two 1µF small input internal power drivers and control circuits are powered from bypass capacitors. One 1µF capacitor should be placed this voltage. INTVCC maximum output current is 20mA. between VIN1 and GND1. A second 1µF capacitor should Do not load the INTVCC pin with external circuitry. INTVCC be placed between VIN2 and GND2. These capacitors must current will be supplied from BIAS if BIAS > 3.1V, otherwise be placed as close as possible to the LT8641. A third larger current will be drawn from VIN. Voltage on INTVCC will capacitor of 2.2µF or more should be placed close to the vary between 2.8V and 3.4V when BIAS is between 3.0V LT8641 with the positive terminal connected to VIN1 and and 3.6V. Decouple this pin to power ground with at least VIN2, and the negative terminal connected to ground. See a 1μF low ESR ceramic capacitor placed close to the IC. the Applications Information section for sample layout.
BST (Pin 3):
This pin is used to provide a drive voltage,
EN/UV (Pin 14):
The LT8641 is shut down when this pin higher than the input voltage, to the topside power switch. is low and active when this pin is high. The hysteretic Place a 0.1µF boost capacitor as close as possible to the IC. threshold voltage is 1.00V going up and 0.96V going
V
down. Tie to VIN if the shutdown feature is not used. An
IN1 (Pin 4):
The LT8641 requires two 1µF small input bypass capacitors. One 1µF capacitor should be placed external resistor divider from VIN can be used to program between V a VIN threshold below which the LT8641 will shut down. IN1 and GND1. A second 1µF capacitor should be placed between VIN2 and GND2. These capacitors must
RT (Pin 15):
A resistor is tied between RT and ground to be placed as close as possible to the LT8641. A third larger set the switching frequency. capacitor of 2.2µF or more should be placed close to the
TR/SS (Pin 16):
Output Tracking and Soft-Start Pin. This LT8641 with the positive terminal connected to VIN1 and pin allows user control of output voltage ramp rate during VIN2, and the negative terminal connected to ground. See start-up. A TR/SS voltage below 0.8V forces the LT8641 to applications section for sample layout. regulate the FB pin to equal the TR/SS pin voltage. When
GND1 (6, 7):
Power Switch Ground. These pins are the TR/SS is above 0.8V, the tracking function is disabled return path of the internal bottom side power switch and and the internal reference resumes control of the error must be tied together. Place the negative terminal of the amplifier. An internal 1.9μA pull-up current from INTVCC input capacitor as close to the GND1 pins as possible. Also on this pin allows a capacitor to program output voltage be sure to tie GND1 to the ground plane. See the Applica- slew rate. This pin is pulled to ground with an internal 200Ω tions Information section for sample layout. MOSFET during shutdown and fault conditions; use a series
SW (Pins 8, 9):
The SW pins are the outputs of the internal resistor if driving from a low impedance output. This pin power switches. Tie these pins together and connect them may be left floating if the tracking function is not needed. to the inductor and boost capacitor. This node should be kept small on the PCB for good performance and low EMI. Rev A 10 For more information www.analog.com Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Typical Applications Related Parts
PIN FUNCTIONS BIAS (Pin 1):
The internal regulator will draw current
GND2 (10, 11):
Power Switch Ground. These pins are the from BIAS instead of VIN when BIAS is tied to a voltage return path of the internal bottom side power switch and higher than 3.1V. For output voltages of 3.3V to 25V this must be tied together. Place the negative terminal of the pin should be tied to VOUT. If this pin is tied to a supply input capacitor as close to the GND2 pins as possible. Also other than VOUT use a 1µF local bypass capacitor on this be sure to tie GND2 to the ground plane. See the Applica- pin. If no supply is available, tie to GND. tions Information section for sample layout.
INTVCC (Pin 2):
Internal 3.4V Regulator Bypass Pin. The
VIN2 (Pin 13):
The LT8641 requires two 1µF small input internal power drivers and control circuits are powered from bypass capacitors. One 1µF capacitor should be placed this voltage. INTVCC maximum output current is 20mA. between VIN1 and GND1. A second 1µF capacitor should Do not load the INTVCC pin with external circuitry. INTVCC be placed between VIN2 and GND2. These capacitors must current will be supplied from BIAS if BIAS > 3.1V, otherwise be placed as close as possible to the LT8641. A third larger current will be drawn from VIN. Voltage on INTVCC will capacitor of 2.2µF or more should be placed close to the vary between 2.8V and 3.4V when BIAS is between 3.0V LT8641 with the positive terminal connected to VIN1 and and 3.6V. Decouple this pin to power ground with at least VIN2, and the negative terminal connected to ground. See a 1μF low ESR ceramic capacitor placed close to the IC. the Applications Information section for sample layout.
BST (Pin 3):
This pin is used to provide a drive voltage,
EN/UV (Pin 14):
The LT8641 is shut down when this pin higher than the input voltage, to the topside power switch. is low and active when this pin is high. The hysteretic Place a 0.1µF boost capacitor as close as possible to the IC. threshold voltage is 1.00V going up and 0.96V going
V
down. Tie to VIN if the shutdown feature is not used. An
IN1 (Pin 4):
The LT8641 requires two 1µF small input bypass capacitors. One 1µF capacitor should be placed external resistor divider from VIN can be used to program between V a VIN threshold below which the LT8641 will shut down. IN1 and GND1. A second 1µF capacitor should be placed between VIN2 and GND2. These capacitors must
RT (Pin 15):
A resistor is tied between RT and ground to be placed as close as possible to the LT8641. A third larger set the switching frequency. capacitor of 2.2µF or more should be placed close to the
TR/SS (Pin 16):
Output Tracking and Soft-Start Pin. This LT8641 with the positive terminal connected to VIN1 and pin allows user control of output voltage ramp rate during VIN2, and the negative terminal connected to ground. See start-up. A TR/SS voltage below 0.8V forces the LT8641 to applications section for sample layout. regulate the FB pin to equal the TR/SS pin voltage. When
GND1 (6, 7):
Power Switch Ground. These pins are the TR/SS is above 0.8V, the tracking function is disabled return path of the internal bottom side power switch and and the internal reference resumes control of the error must be tied together. Place the negative terminal of the amplifier. An internal 1.9μA pull-up current from INTVCC input capacitor as close to the GND1 pins as possible. Also on this pin allows a capacitor to program output voltage be sure to tie GND1 to the ground plane. See the Applica- slew rate. This pin is pulled to ground with an internal 200Ω tions Information section for sample layout. MOSFET during shutdown and fault conditions; use a series
SW (Pins 8, 9):
The SW pins are the outputs of the internal resistor if driving from a low impedance output. This pin power switches. Tie these pins together and connect them may be left floating if the tracking function is not needed. to the inductor and boost capacitor. This node should be kept small on the PCB for good performance and low EMI. Rev A 10 For more information www.analog.com Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Typical Applications Related Parts
