Datasheet LTC3630A (Analog Devices) - 9

ManufacturerAnalog Devices
DescriptionHigh Efficiency, 76V 500mA Synchronous Step-Down Converter
Pages / Page26 / 9 — operaTion (Refer to Block Diagram). Figure 1. Burst Mode Operation. Main …
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operaTion (Refer to Block Diagram). Figure 1. Burst Mode Operation. Main Control Loop. Start-Up and Shutdown

operaTion (Refer to Block Diagram) Figure 1 Burst Mode Operation Main Control Loop Start-Up and Shutdown

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LTC3630A
operaTion (Refer to Block Diagram)
The LTC3630A is a synchronous step-down DC/DC con- reducing the VIN pin supply current to only 12µA. As the verter with internal power switches that uses Burst Mode load current discharges the output capacitor, the voltage control. The low quiescent current and high switching on the VFB pin decreases. When this voltage falls 5mV frequency results in high efficiency across a wide range below the 800mV reference, the feedback comparator of load currents. Burst Mode operation functions by using trips and enables burst cycles. short “burst” cycles to switch the inductor current through At the beginning of the burst cycle, the internal high side the internal power MOSFETs, followed by a sleep cycle power switch (P-channel MOSFET) is turned on and the where the power switches are off and the load current is inductor current begins to ramp up. The inductor current supplied by the output capacitor. During the sleep cycle, increases until either the current exceeds the peak cur- the LTC3630A draws only 12µA of supply current. At light rent comparator threshold or the voltage on the V loads, the burst cycles are a small percentage of the total FB pin exceeds 800mV, at which time the high side power switch cycle time which minimizes the average supply current, is turned off and the low side power switch (N-channel greatly improving efficiency. Figure 1 shows an example MOSFET) turns on. The inductor current ramps down until of Burst Mode operation. The switching frequency and the the reverse current comparator trips, signaling that the number of switching cycles during Burst Mode operation current is close to zero. If the voltage on the V are dependent on the inductor value, peak current, load FB pin is still less than the 800mV reference, the high side power current, input voltage and output voltage. switch is turned on again and another cycle commences. SLEEP The average current during a burst cycle will normally be CYCLE SWITCHING BURST FREQUENCY greater than the average load current. For this architecture, CYCLE the maximum average output current is equal to half of the peak current. INDUCTOR CURRENT The hysteretic nature of this control architecture results in a switching frequency that is a function of the input BURST FREQUENCY voltage, output voltage, and inductor value. This behavior provides inherent short-circuit protection. If the output is OUTPUT shorted to ground, the inductor current will decay very VOLTAGE slowly during a single switching cycle. Since the high side ∆VOUT 3630a F01 switch turns on only when the inductor current is near zero, the LTC3630A inherently switches at a lower frequency
Figure 1. Burst Mode Operation
during start-up or short-circuit conditions.
Main Control Loop Start-Up and Shutdown
The LTC3630A uses the VPRG1 and VPRG2 control pins to If the voltage on the RUN pin is less than 0.7V, the connect internal feedback resistors to the VFB pin. This LTC3630A enters a shutdown mode in which all internal enables fixed outputs of 1.8V, 3.3V or 5V without increas- circuitry is disabled, reducing the DC supply current to ing component count, input supply current or exposure to 5µA. When the voltage on the RUN pin exceeds 1.21V, noise on the sensitive input to the feedback comparator. normal operation of the main control loop is enabled. The External feedback resistors (adjustable mode) can still RUN pin comparator has 110mV of internal hysteresis, be used by connecting both VPRG1 and VPRG2 to ground. and therefore must fall below 1.1V to stop switching and In adjustable mode the feedback comparator monitors disable the main control loop. the voltage on the VFB pin and compares it to an inter- An internal 0.8ms soft-start function limits the ramp rate nal 800mV reference. If this voltage is greater than the of the output voltage on start-up to prevent excessive input reference, the comparator activates a sleep mode in which supply droop. If a longer ramp time and consequently less the power switches and current comparators are disabled, 3630afc For more information www.linear.com/LTC3630A 9 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
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